| /freebsd/sys/contrib/dev/rtw89/ |
| H A D | pci_be.c | 97 rtw89_write32(rtwdev, R_BE_AON_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be() 98 rtw89_write32(rtwdev, R_BE_MDIO_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be() 99 rtw89_write32(rtwdev, R_BE_LA_MODE_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be() 100 rtw89_write32(rtwdev, R_BE_WDT_AR_TMR, val32); in rtw89_pci_set_io_rcy_be() 101 rtw89_write32(rtwdev, R_BE_WDT_AW_TMR, val32); in rtw89_pci_set_io_rcy_be() 102 rtw89_write32(rtwdev, R_BE_WDT_W_TMR, val32); in rtw89_pci_set_io_rcy_be() 103 rtw89_write32(rtwdev, R_BE_WDT_B_TMR, val32); in rtw89_pci_set_io_rcy_be() 104 rtw89_write32(rtwdev, R_BE_WDT_R_TMR, val32); in rtw89_pci_set_io_rcy_be() 109 rtw89_write32(rtwdev, R_BE_WLAN_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be() 110 rtw89_write32(rtwdev, R_BE_AXIDMA_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be() [all …]
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| H A D | mac_be.c | 159 rtw89_write32(rtwdev, R_BE_CH_PAGE_CTRL, val); in hfc_h2c_cfg_be() 174 rtw89_write32(rtwdev, R_BE_CH_PAGE_CTRL, val); in hfc_mix_cfg_be() 177 rtw89_write32(rtwdev, R_BE_PUB_PAGE_CTRL2, val); in hfc_mix_cfg_be() 187 rtw89_write32(rtwdev, R_BE_WP_PAGE_CTRL1, val); in hfc_mix_cfg_be() 199 rtw89_write32(rtwdev, R_BE_HCI_FC_CTRL, val); in hfc_mix_cfg_be() 213 rtw89_write32(rtwdev, R_BE_HCI_FC_CTRL, val); in hfc_func_en_be() 269 rtw89_write32(rtwdev, R_BE_WDE_PKTBUF_CFG, val); in dle_mix_cfg_be() 292 rtw89_write32(rtwdev, R_BE_PLE_PKTBUF_CFG, val); in dle_mix_cfg_be() 319 rtw89_write32(rtwdev, \ 400 rtw89_write32(rtwdev, R_BE_HAXI_INIT_CFG1, val); in rtw89_mac_dmac_func_pre_en_be() [all …]
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| H A D | mac.c | 48 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_write() 49 rtw89_write32(rtwdev, mac->indir_access_addr, val); in rtw89_mac_mem_write() 58 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_read() 96 rtw89_write32(rtwdev, R_AX_LTE_WDATA, val); in rtw89_mac_write_lte() 97 rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0xC00F0000 | offset); in rtw89_mac_write_lte() 112 rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0x800F0000 | offset); in rtw89_mac_read_lte() 144 rtw89_write32(rtwdev, ctrl_reg, ctrl_data); in rtw89_mac_dle_dfi_cfg() 828 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); in rtw89_mac_get_err_status() 874 rtw89_write32(rtwdev, R_AX_HALT_H2C, err); in rtw89_mac_set_err_status() 879 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, B_AX_HALT_H2C_TRIGGER); in rtw89_mac_set_err_status() [all …]
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| H A D | pci.c | 789 rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs() 790 rtw89_write32(rtwdev, R_AX_PCIE_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs() 791 rtw89_write32(rtwdev, R_AX_PCIE_HISR10, isrs->isrs[1]); in rtw89_pci_recognize_intrs() 808 rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs_v1() 810 rtw89_write32(rtwdev, R_AX_HAXI_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs_v1() 812 rtw89_write32(rtwdev, R_AX_HISR1, isrs->isrs[1]); in rtw89_pci_recognize_intrs_v1() 828 rtw89_write32(rtwdev, R_BE_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs_v2() 830 rtw89_write32(rtwdev, R_BE_HAXI_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs_v2() 832 rtw89_write32(rtwdev, R_BE_PCIE_DMA_ISR, isrs->isrs[1]); in rtw89_pci_recognize_intrs_v2() 833 rtw89_write32(rtwdev, R_BE_PCIE_HISR, isrs->ind_isrs); in rtw89_pci_recognize_intrs_v2() [all …]
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| H A D | debug.c | 347 rtw89_write32(rtwdev, addr, (u32)val); in rtw89_debug_priv_write_reg_set() 1146 rtw89_write32(rtwdev, filter_model_addr, base_addr); in rtw89_debug_dump_mac_mem() 1268 rtw89_write32(rtwdev, __reg_ctrl, __ctrl); \ in rtw89_debug_mac_dump_dle_dbg() 2637 rtw89_write32(rtwdev, R_AX_SCH_DBG_SEL, val32); in rtw89_debug_mac_dbg_port_sel() 2644 rtw89_write32(rtwdev, R_AX_SCH_DBG_SEL_C1, val32); in rtw89_debug_mac_dbg_port_sel() 2652 rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL, val32); in rtw89_debug_mac_dbg_port_sel() 2657 rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); in rtw89_debug_mac_dbg_port_sel() 2661 rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); in rtw89_debug_mac_dbg_port_sel() 2669 rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL_C1, val32); in rtw89_debug_mac_dbg_port_sel() 2674 rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); in rtw89_debug_mac_dbg_port_sel() [all …]
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| H A D | phy_be.c | 447 rtw89_write32(rtwdev, flush_addr, val32); in rtw89_write_bb_wrap_flush() 450 rtw89_write32(rtwdev, addr, data); in rtw89_write_bb_wrap_flush() 492 rtw89_write32(rtwdev, t, 0); in rtw89_phy_bb_wrap_tpu_set_all() 496 rtw89_write32(rtwdev, t, 0); in rtw89_phy_bb_wrap_tpu_set_all() 500 rtw89_write32(rtwdev, t, 0); in rtw89_phy_bb_wrap_tpu_set_all() 555 rtw89_write32(rtwdev, addr, 0xE4E431); in rtw89_phy_bb_wrap_ftm_init() 600 rtw89_write32(rtwdev, reg, 0x00010001); in rtw89_phy_bb_wrap_set_rfsi_ct_opt() 603 rtw89_write32(rtwdev, reg, 0x00010001); in rtw89_phy_bb_wrap_set_rfsi_ct_opt() 898 rtw89_write32(rtwdev, addr, 0x0201FE00); in rtw89_phy_bb_wrap_ul_pwr() 900 rtw89_write32(rtwdev, addr, 0x00FFEC7E); in rtw89_phy_bb_wrap_ul_pwr()
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| H A D | rtw8922a.c | 494 rtw89_write32(rtwdev, R_BE_WLLPS_CTRL, 0x0000A1B2); in rtw8922a_pwr_off_func() 497 rtw89_write32(rtwdev, R_BE_UDM1, 0); in rtw8922a_pwr_off_func() 859 rtw89_write32(rtwdev, sub_carr, txsb); in rtw8922a_set_channel_mac() 1675 rtw89_write32(rtwdev, reg, path_com_cr[i].data); in rtw8922a_ctrl_tx_path_tmac() 2587 rtw89_write32(rtwdev, R_BTC_COEX_WL_REQ_BE, wl_pri); in rtw8922a_btc_init_cfg() 2590 rtw89_write32(rtwdev, R_BE_BT_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8922a_btc_init_cfg() 2593 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_0, 0xda5a5a5a); in rtw8922a_btc_init_cfg() 2595 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_1, 0xda5a5a5a); in rtw8922a_btc_init_cfg() 2597 rtw89_write32(rtwdev, R_BTC_ZB_BREAK_TBL, 0xf0ffffff); in rtw8922a_btc_init_cfg() 2814 rtw89_write32(rtwdev, R_BE_DMAC_SYS_CR32B, 0x7FF97FF9); in rtw8922a_mac_enable_bb_rf()
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| H A D | usb.c | 96 rtw89_write32(rtwdev, R_AX_CK_EN, B_AX_CMAC_ALLCKEN); in rtw89_usb_read_cmac() 734 rtw89_write32(rtwdev, info->hci_func_en, val32); in rtw89_usb_ops_mac_pre_init() 737 rtw89_write32(rtwdev, info->hci_func_en, val32); in rtw89_usb_ops_mac_pre_init()
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| H A D | ser.c | 595 rtw89_write32(rtwdev, filter_model_addr, base_addr); in ser_mac_mem_dump() 676 rtw89_write32(rtwdev, filter_model_addr, fwbt_addr); in rtw89_ser_fw_backtrace_dump()
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| H A D | rtw8852b_common.c | 474 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in __rtw8852bx_set_channel_mac() 478 rtw89_write32(rtwdev, sub_carr, txsc20); in __rtw8852bx_set_channel_mac() 482 rtw89_write32(rtwdev, sub_carr, 0); in __rtw8852bx_set_channel_mac() 1837 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in __rtw8852bx_btc_init_cfg() 2018 rtw89_write32(rtwdev, R_AX_AFE_OFF_CTRL1, val32); in __rtw8852bx_mac_enable_bb_rf()
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| H A D | rtw8851b.c | 521 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8851b_pwr_off_func() 538 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); in rtw8851b_pwr_off_func() 903 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in rtw8851b_set_channel_mac() 907 rtw89_write32(rtwdev, sub_carr, txsc20); in rtw8851b_set_channel_mac() 911 rtw89_write32(rtwdev, sub_carr, 0); in rtw8851b_set_channel_mac() 2228 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8851b_btc_init_cfg()
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| H A D | phy.h | 600 rtw89_write32(rtwdev, addr + phy->cr_base, data); in rtw89_phy_write32() 662 rtw89_write32(rtwdev, addr + RTW89_BBMCU_ADDR_OFFSET, data); in rtw89_bbmcu_write32()
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| H A D | rtw8852b.c | 523 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8852b_pwr_off_func() 536 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); in rtw8852b_pwr_off_func()
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| H A D | efuse.c | 124 rtw89_write32(rtwdev, R_AX_EFUSE_CTRL, efuse_ctl & ~B_AX_EF_RDY); in rtw89_dump_physical_efuse_map_ddv()
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| H A D | rtw8852c.c | 462 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8852c_pwr_off_func() 477 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); in rtw8852c_pwr_off_func() 815 rtw89_write32(rtwdev, sub_carr, txsc); in rtw8852c_set_channel_mac() 2402 rtw89_write32(rtwdev, reg, 0); in rtw8852c_ctrl_tx_path_tmac() 2432 rtw89_write32(rtwdev, reg, path_com[i].data); in rtw8852c_ctrl_tx_path_tmac() 2700 rtw89_write32(rtwdev, R_AX_BT_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8852c_btc_init_cfg()
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| H A D | rtw8852a.c | 852 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in rtw8852a_set_channel_mac() 856 rtw89_write32(rtwdev, sub_carr, txsc20); in rtw8852a_set_channel_mac() 860 rtw89_write32(rtwdev, sub_carr, 0); in rtw8852a_set_channel_mac() 1895 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8852a_btc_init_cfg()
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| H A D | efuse_be.c | 82 rtw89_write32(rtwdev, R_BE_EFUSE_CTRL, efuse_ctl & ~B_BE_EF_RDY); in rtw89_dump_physical_efuse_map_ddv_be()
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| H A D | mac.h | 1191 rtw89_write32(rtwdev, reg, data); in rtw89_write32_port() 1519 rtw89_write32(rtwdev, cr, val); in rtw89_mac_txpwr_write32()
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| H A D | rtw8852bt.c | 418 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8852bt_pwr_off_func()
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| H A D | core.h | 6659 static inline void rtw89_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data) in rtw89_write32() function 6688 rtw89_write32(rtwdev, addr, val | bit); in rtw89_write32_set() 6715 rtw89_write32(rtwdev, addr, val & ~bit); in rtw89_write32_clr() 6768 rtw89_write32(rtwdev, addr, set); in rtw89_write32_mask()
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| H A D | mac80211.c | 459 rtw89_write32(rtwdev, reg, val); in ____rtw89_conf_tx_mu_edca()
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| H A D | fw.c | 1778 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); 1779 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); 1904 rtw89_write32(rtwdev, R_AX_DBG_CTRL, 1952 rtw89_write32(rtwdev, R_BE_SECURE_BOOT_MALLOC_INFO, 0x20248000); 8027 rtw89_write32(rtwdev, h2c_reg[i], info->u.h2creg[i]);
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| H A D | rtw8852b_rfk.c | 373 rtw89_write32(rtwdev, R_AX_PHYREG_SET, 0xf); in _afe_init()
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| H A D | coex.c | 8024 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_0, zb_tbl0); in _update_zb_coex_tbl() 8025 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_1, zb_tbl1); in _update_zb_coex_tbl()
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