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Searched refs:opstr (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsDSPInstrFormats.td9 class MMDSPInst<string opstr = "">
13 string BaseOpcode = opstr;
24 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
36 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
47 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
60 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
73 class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
85 class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
98 class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
111 class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
[all …]
H A DMicroMipsInstrInfo.td203 class CompactBranchMM<string opstr, DAGOperand opnd, RegisterOperand RO> :
205 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
213 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
216 !strconcat(opstr, "\t$rt, $addr"),
221 let BaseOpcode = opstr;
226 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
229 !strconcat(opstr, "\t$rt, $addr"),
232 let BaseOpcode = opstr;
237 class MovePMM16<string opstr, RegisterOperand RO1, RegisterOperand RO2,
240 !strconcat(opstr, "\t$rd1, $rd2, $rs, $rt"), [],
[all …]
H A DMipsInstrInfo.td1318 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1322 !strconcat(opstr, "\t$rd, $rs, $rt"),
1323 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1330 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1335 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1337 Itin, FrmI, opstr> {
1343 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1345 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1352 class LogicNOR<string opstr, RegisterOperand RO>:
1354 !strconcat(opstr, "\t$rd, $rs, $rt"),
[all …]
H A DMipsInstrFPU.td111 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
114 !strconcat(opstr, "\t$fd, $fs, $ft"),
115 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
120 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
122 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
123 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
128 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
130 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
131 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
135 class CVT_PS_S_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
[all …]
H A DMicroMips32r6InstrInfo.td459 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
460 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
462 MMR6Arch<opstr> {
470 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
473 : MMR6Arch<opstr> {
475 string AsmString = !strconcat(opstr, "\t$rt, $offset");
494 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
495 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
497 MMR6Arch<opstr> {
608 class DIVMOD_MMR6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
[all …]
H A DMipsCondMov.td18 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
21 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
26 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
29 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
35 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
38 !strconcat(opstr, "\t$rd, $rs, $fcc"),
40 Itin, FrmFR, opstr>, HARDFLOAT {
45 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
48 !strconcat(opstr, "\t$fd, $fs, $fcc"),
50 Itin, FrmFR, opstr>, HARDFLOAT {
H A DMips64InstrInfo.td455 class Count1s<string opstr, RegisterOperand RO>:
456 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
457 [(set RO:$rd, (ctpop RO:$rs))], II_POP, FrmR, opstr> {
461 class ExtsCins<string opstr, InstrItinClass itin, RegisterOperand RO,
464 !strconcat(opstr, "\t$rt, $rs, $pos, $lenm1"),
466 itin, FrmR, opstr> {
470 class SetCC64_R<string opstr, PatFrag cond_op> :
472 !strconcat(opstr, "\t$rd, $rs, $rt"),
475 II_SEQ_SNE, FrmR, opstr> {
479 class SetCC64_I<string opstr, PatFrag cond_op>:
[all …]
H A DMicroMipsInstrFPU.td13 multiclass ADDS_MMM<string opstr, InstrItinClass Itin, bit IsComm,
15 def _D32_MM : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>,
20 def _D64_MM : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
110 multiclass ABSS_MMM<string opstr, InstrItinClass Itin,
112 def _D32_MM : MMRel, ABSS_FT<opstr, AFGR64Opnd, AFGR64Opnd, Itin, OpNode>,
116 def _D64_MM : StdMMR6Rel, ABSS_FT<opstr, FGR64Opnd, FGR64Opnd, Itin, OpNode>,
H A DMipsDSPInstrFormats.td46 class DSPInst<string opstr = "">
49 string BaseOpcode = opstr;
H A DMicroMips32r6InstrFormats.td13 class MMR6Arch<string opstr> {
15 string BaseOpcode = opstr;
935 class CMP_BRANCH_2R_OFF16_FM_MMR6<string opstr, bits<6> funct>
936 : MipsR6Inst, MMR6Arch<opstr> {
H A DMips32r6InstrFormats.td27 class MipsR6Arch<string opstr> {
29 string BaseOpcode = opstr;
H A DMipsInstrFormats.td116 InstrItinClass itin, Format f, string opstr = ""> :
119 string BaseOpcode = opstr;
H A DMicroMipsDSPInstrInfo.td179 class ABSQ_S_PH_MM_R2_DESC_BASE<string opstr, SDPatternOperator OpNode,
184 string AsmString = !strconcat(opstr, "\t$rt, $rs");
H A DMips32r6InstrInfo.td491 class JMP_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
494 : MipsR6Arch<opstr> {
496 string AsmString = !strconcat(opstr, "\t$rt, $offset");
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td9 class J16<bits<5> sop, string opstr, dag ins>
11 !strconcat(opstr, "\t$offset"), []> {
18 class J16_B<bits<5> sop, string opstr>
20 !strconcat(opstr, "\t$offset"), []> {
27 class R16_XYZ<bits<2> sop, string opstr, SDNode opnode> : CSKY16Inst<AddrModeNone,
28 (outs mGPR:$rz), (ins mGPR:$rx, mGPR:$ry), !strconcat(opstr, "\t$rz, $rx, $ry"),
40 class R16_XZ_BINOP<bits<4> op, bits<2> sop, string opstr, PatFrag opnode> : CSKY16Inst<
41 AddrModeNone, (outs sGPR:$rz), (ins sGPR:$rZ, sGPR:$rx), !strconcat(opstr, "\t$rz, $rx"),
53 class R16_XZ_BINOP_NOPat<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
54 AddrModeNone, (outs sGPR:$rz), (ins sGPR:$rZ, sGPR:$rx), !strconcat(opstr, "\t$rz, $rx"),
[all …]
H A DCSKYInstrInfo16Instr.td426 class JBranchPseudo<dag out, dag ins, string opstr> :
427 CSKYPseudo<out, ins, opstr, []> {
/freebsd/sys/amd64/vmm/
H A Dvmm_snapshot.c44 const char *opstr; in vm_snapshot_buf_err() local
47 opstr = "save"; in vm_snapshot_buf_err()
49 opstr = "restore"; in vm_snapshot_buf_err()
51 opstr = "unknown"; in vm_snapshot_buf_err()
53 printf("%s: snapshot-%s failed for %s\r\n", __func__, opstr, bufname); in vm_snapshot_buf_err()
/freebsd/cddl/contrib/opensolaris/lib/libdtrace/common/
H A Ddt_parser.c128 opstr(int op) in opstr() function
468 (void) snprintf(buf, len, "operator %s", opstr(dnp->dn_op)); in dt_node_name()
3052 "of arithmetic type\n", opstr(dnp->dn_op)); in dt_cook_op1()
3060 "integral type\n", opstr(dnp->dn_op)); in dt_cook_op1()
3068 "of scalar type\n", opstr(dnp->dn_op)); in dt_cook_op1()
3142 "scalar type\n", opstr(dnp->dn_op)); in dt_cook_op1()
3147 "of known size\n", opstr(dnp->dn_op)); in dt_cook_op1()
3152 "lvalue as an operand\n", opstr(dnp->dn_op)); in dt_cook_op1()
3157 "to a writable variable\n", opstr(dnp->dn_op)); in dt_cook_op1()
3164 xyerror(D_UNKNOWN, "invalid unary op %s\n", opstr(dnp->dn_op)); in dt_cook_op1()
[all …]
/freebsd/usr.bin/systat/
H A Diolat.c269 char *walker, *dev, *opstr; in walk_sysctl() local
292 opstr = strsep(&walker, "."); in walk_sysctl()
293 op = op2num(opstr); in walk_sysctl()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.td2634 class LoadParamMemInst<NVPTXRegClass regclass, string opstr> :
2636 !strconcat("ld.param", opstr, " \t$dst, [retval0+$b];"),
2639 class LoadParamV2MemInst<NVPTXRegClass regclass, string opstr> :
2641 !strconcat("ld.param.v2", opstr,
2644 class LoadParamV4MemInst<NVPTXRegClass regclass, string opstr> :
2648 !strconcat("ld.param.v4", opstr,
2653 class LoadParamRegInst<NVPTXRegClass regclass, string opstr> :
2655 !strconcat("mov", opstr, " \t$dst, retval$b;"),
2660 …multiclass StoreParamInst<NVPTXRegClass regclass, Operand IMMType, string opstr, bit support_imm =…
2666 "st.param" # opstr # " \t[param$a+$b], $val;",
[all …]
/freebsd/sys/net80211/
H A Dieee80211_ioctl.c1303 const char *opstr; in mlmedebug() member
1330 "station %s via MLME", ops[op].opstr); in mlmedebug()
1333 "station %s via MLME (reason: %d (%s))", ops[op].opstr, in mlmedebug()