Lines Matching refs:opstr
1318 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1322 !strconcat(opstr, "\t$rd, $rs, $rt"),
1323 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1330 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1335 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1337 Itin, FrmI, opstr> {
1343 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1345 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1352 class LogicNOR<string opstr, RegisterOperand RO>:
1354 !strconcat(opstr, "\t$rd, $rs, $rt"),
1355 [(set RO:$rd, (not (or RO:$rs, RO:$rt)))], II_NOR, FrmR, opstr> {
1360 class shift_rotate_imm<string opstr, Operand ImmOpnd,
1365 !strconcat(opstr, "\t$rd, $rt, $shamt"),
1366 [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], itin, FrmR, opstr> {
1370 class shift_rotate_reg<string opstr, RegisterOperand RO, InstrItinClass itin,
1373 !strconcat(opstr, "\t$rd, $rt, $rs"),
1375 opstr>;
1378 class LoadUpper<string opstr, RegisterOperand RO, Operand Imm>:
1379 InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"),
1380 [], II_LUI, FrmI, opstr>, IsAsCheapAsAMove {
1386 class LoadMemory<string opstr, DAGOperand RO, DAGOperand MO,
1390 InstSE<(outs RO:$rt), (ins MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
1391 [(set RO:$rt, (OpNode Addr:$addr))], Itin, FrmI, opstr> {
1394 string BaseOpcode = opstr;
1398 class Load<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
1400 LoadMemory<opstr, RO, mem, OpNode, Itin, Addr>;
1402 class StoreMemory<string opstr, DAGOperand RO, DAGOperand MO,
1405 InstSE<(outs), (ins RO:$rt, MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
1406 [(OpNode RO:$rt, Addr:$addr)], Itin, FrmI, opstr> {
1408 string BaseOpcode = opstr;
1412 class Store<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
1415 StoreMemory<opstr, RO, MO, OpNode, Itin, Addr>;
1419 class LoadLeftRight<string opstr, SDNode OpNode, RegisterOperand RO,
1422 !strconcat(opstr, "\t$rt, $addr"),
1426 let BaseOpcode = opstr;
1429 class StoreLeftRight<string opstr, SDNode OpNode, RegisterOperand RO,
1431 InstSE<(outs), (ins RO:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
1434 let BaseOpcode = opstr;
1438 class LW_FT2<string opstr, RegisterOperand RC, InstrItinClass Itin,
1441 !strconcat(opstr, "\t$rt, $addr"),
1442 [(set RC:$rt, (OpNode addrDefault:$addr))], Itin, FrmFI, opstr> {
1447 class SW_FT2<string opstr, RegisterOperand RC, InstrItinClass Itin,
1450 !strconcat(opstr, "\t$rt, $addr"),
1451 [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr> {
1457 class LW_FT3<string opstr, RegisterOperand RC, InstrItinClass Itin,
1459 InstSE<(outs RC:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
1460 [(set RC:$rt, (OpNode addrDefault:$addr))], Itin, FrmFI, opstr> {
1465 class SW_FT3<string opstr, RegisterOperand RC, InstrItinClass Itin,
1467 InstSE<(outs), (ins RC:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
1468 [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr> {
1474 class CBranch<string opstr, DAGOperand opnd, PatFrag cond_op,
1477 !strconcat(opstr, "\t$rs, $rt, $offset"),
1479 FrmI, opstr> {
1487 class CBranchLikely<string opstr, DAGOperand opnd, RegisterOperand RO> :
1489 !strconcat(opstr, "\t$rs, $rt, $offset"), [], II_BCC, FrmI, opstr> {
1497 class CBranchZero<string opstr, DAGOperand opnd, PatFrag cond_op,
1500 !strconcat(opstr, "\t$rs, $offset"),
1502 FrmI, opstr> {
1510 class CBranchZeroLikely<string opstr, DAGOperand opnd, RegisterOperand RO> :
1512 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZ, FrmI, opstr> {
1521 class SetCC_R<string opstr, PatFrag cond_op, RegisterOperand RO> :
1523 !strconcat(opstr, "\t$rd, $rs, $rt"),
1525 II_SLT_SLTU, FrmR, opstr>;
1527 class SetCC_I<string opstr, PatFrag cond_op, Operand Od, PatLeaf imm_type,
1530 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1532 II_SLTI_SLTIU, FrmI, opstr>;
1535 class JumpFJ<DAGOperand opnd, string opstr, SDPatternOperator operator,
1537 InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
1562 class JumpFR<string opstr, RegisterOperand RO,
1565 FrmR, opstr>;
1568 class IndirectBranch<string opstr, RegisterOperand RO> : JumpFR<opstr, RO> {
1575 class JumpLink<string opstr, DAGOperand opnd> :
1576 InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
1577 [(MipsJmpLink tglobaladdr:$target)], II_JAL, FrmJ, opstr> {
1588 class JumpLinkReg<string opstr, RegisterOperand RO>:
1589 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
1590 [], II_JALR, FrmR, opstr> {
1594 class BGEZAL_FT<string opstr, DAGOperand opnd,
1597 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZAL, FrmI, opstr> {
1629 class SYS_FT<string opstr, Operand ImmOp, InstrItinClass itin = NoItinerary> :
1631 !strconcat(opstr, "\t$code_"), [], itin, FrmI, opstr>;
1633 class BRK_FT<string opstr> :
1635 !strconcat(opstr, "\t$code_1, $code_2"), [], II_BREAK,
1636 FrmOther, opstr>;
1639 class ER_FT<string opstr, InstrItinClass itin = NoItinerary> :
1641 opstr, [], itin, FrmOther, opstr>;
1644 class WAIT_FT<string opstr> :
1645 InstSE<(outs), (ins), opstr, [], II_WAIT, FrmOther, opstr>;
1649 class DEI_FT<string opstr, RegisterOperand RO,
1652 !strconcat(opstr, "\t$rt"), [], itin, FrmOther, opstr>;
1656 class SYNC_FT<string opstr> :
1658 [(MipsSync immZExt5:$stype)], II_SYNC, FrmOther, opstr>;
1660 class SYNCI_FT<string opstr, DAGOperand MO> :
1661 InstSE<(outs), (ins MO:$addr), !strconcat(opstr, "\t$addr"), [],
1662 II_SYNCI, FrmOther, opstr> {
1668 class TEQ_FT<string opstr, RegisterOperand RO, Operand ImmOp,
1671 !strconcat(opstr, "\t$rs, $rt, $code_"), [], itin, FrmI, opstr>;
1673 class TEQI_FT<string opstr, RegisterOperand RO,
1676 !strconcat(opstr, "\t$rs, $imm16"), [], itin, FrmOther, opstr>;
1680 class Mult<string opstr, InstrItinClass itin, RegisterOperand RO,
1682 InstSE<(outs), (ins RO:$rs, RO:$rt), !strconcat(opstr, "\t$rs, $rt"), [],
1683 itin, FrmR, opstr> {
1716 class Div<string opstr, InstrItinClass itin, RegisterOperand RO,
1718 InstSE<(outs), (ins RO:$rs, RO:$rt), !strconcat(opstr, "\t$$zero, $rs, $rt"),
1719 [], itin, FrmR, opstr> {
1728 class MoveFromLOHI<string opstr, RegisterOperand RO, Register UseReg>:
1729 InstSE<(outs RO:$rd), (ins), !strconcat(opstr, "\t$rd"), [], II_MFHI_MFLO,
1730 FrmR, opstr> {
1741 class MoveToLOHI<string opstr, RegisterOperand RO, list<Register> DefRegs>:
1742 InstSE<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"), [], II_MTHI_MTLO,
1743 FrmR, opstr> {
1749 class EffectiveAddress<string opstr, RegisterOperand RO> :
1750 InstSE<(outs RO:$rt), (ins mem_ea:$addr), !strconcat(opstr, "\t$rt, $addr"),
1752 !strconcat(opstr, "_lea")> {
1759 class CountLeading0<string opstr, RegisterOperand RO,
1761 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
1762 [(set RO:$rd, (ctlz RO:$rs))], itin, FrmR, opstr>;
1764 class CountLeading1<string opstr, RegisterOperand RO,
1766 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
1767 [(set RO:$rd, (ctlz (not RO:$rs)))], itin, FrmR, opstr>;
1770 class SignExtInReg<string opstr, ValueType vt, RegisterOperand RO,
1772 InstSE<(outs RO:$rd), (ins RO:$rt), !strconcat(opstr, "\t$rd, $rt"),
1773 [(set RO:$rd, (sext_inreg RO:$rt, vt))], itin, FrmR, opstr>;
1776 class SubwordSwap<string opstr, RegisterOperand RO,
1778 InstSE<(outs RO:$rd), (ins RO:$rt), !strconcat(opstr, "\t$rd, $rt"), [], itin,
1779 FrmR, opstr> {
1789 class ExtBase<string opstr, RegisterOperand RO, Operand PosOpnd,
1793 !strconcat(opstr, "\t$rt, $rs, $pos, $size"),
1795 FrmR, opstr>;
1798 class InsBase<string opstr, RegisterOperand RO, Operand PosOpnd,
1801 !strconcat(opstr, "\t$rt, $rs, $pos, $size"),
1804 II_INS, FrmR, opstr> {
1847 class LLBase<string opstr, RegisterOperand RO, DAGOperand MO = mem> :
1848 InstSE<(outs RO:$rt), (ins MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
1849 [], II_LL, FrmI, opstr> {
1854 class SCBase<string opstr, RegisterOperand RO> :
1856 !strconcat(opstr, "\t$rt, $addr"), [], II_SC, FrmI> {
2627 class HYPCALL_FT<string opstr> :
2629 !strconcat(opstr, "\t$code_"), [], II_HYPCALL, FrmOther, opstr> {
2630 let BaseOpcode = opstr;