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Searched refs:lmul (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td371 // The set of legal NF for LMUL = lmul.
376 class NFList<int lmul> {
377 list<int> L = !cond(!eq(lmul, 8): [],
378 !eq(lmul, 4): [2],
379 !eq(lmul, 2): [2, 3, 4],
384 class SubRegSet<int nf, int lmul> {
390 [!cast<SubRegIndex>("sub_vrm" # lmul # "_" # i)],
400 // (tuple_index + i) x lmul <= (tuple_index x lmul) + 32 - (nf x lmul)
409 class IndexSet<int tuple_index, int nf, int lmul, bit isV0 = false> {
414 !eq(lmul, 1): !listconcat(!range(8, 32), !range(1, 8)),
[all …]
H A DRISCVVectorPeephole.cpp161 #define CASE_VMERGE_TO_VMV(lmul) \ in convertVMergeToVMv() argument
162 case RISCV::PseudoVMERGE_VVM_##lmul: \ in convertVMergeToVMv()
163 NewOpc = RISCV::PseudoVMV_V_V_##lmul; \ in convertVMergeToVMv()
H A DRISCVInstrInfoVPseudos.td140 class LMULInfo<int lmul, int oct, VReg regclass, VReg wregclass,
142 bits<3> value = lmul; // This is encoded as the vlmul field of vtype.
218 defvar lmul = !shl(1, m.value);
219 list<int> L = NFList<lmul>.L;
1833 foreach lmul = MxSet<eew>.m in {
1834 defvar LInfo = lmul.MX;
1835 defvar vreg = lmul.vrclass;
1836 let VLMul = lmul.value, SEW=eew in {
1851 foreach lmul = MxSet<eew>.m in {
1852 defvar LInfo = lmul.MX;
[all …]
H A DRISCVInstrInfoV.td183 class VLESched<string lmul, bit forceMasked = 0> : SchedCommon<
184 [!cast<SchedWrite>("WriteVLDE_" # lmul)],
185 [ReadVLDX], mx=lmul, forceMasked=forceMasked
189 class VSESched<string lmul, bit forceMasked = 0> : SchedCommon<
190 [!cast<SchedWrite>("WriteVSTE_" # lmul)],
191 [!cast<SchedRead>("ReadVSTEV_" # lmul), ReadVSTX], mx=lmul,
231 class VLFSched<string lmul, bit forceMasked = 0> : SchedCommon<
232 [!cast<SchedWrite>("WriteVLDFF_" # lmul)],
233 [ReadVLDX], mx=lmul, forceMasked=forceMasked
H A DRISCVInstrInfoVVLPatterns.td2960 // emul = lmul * 16 / sew
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.td520 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4", []>;