Home
last modified time | relevance | path

Searched refs:isPPC64 (Results 1 – 25 of 50) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp45 return STI.isPPC64() ? 16 : 8; in computeReturnSaveOffset()
47 return STI.isPPC64() ? 16 : 4; in computeReturnSaveOffset()
52 return STI.isPPC64() ? 40 : 20; in computeTOCSaveOffset()
58 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
62 if (STI.isAIXABI() || STI.isPPC64()) in computeLinkageSize()
63 return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4); in computeLinkageSize()
75 return STI.isPPC64() ? -16U : -8U; in computeBasePointerSaveOffset()
79 return (STI.isAIXABI() && !STI.isPPC64()) ? 4 : 8; in computeCRSaveOffset()
243 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
448 Register R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0; in findScratchRegister()
[all …]
H A DPPCInstr64Bit.td340 "lqarx $RST, $addr", IIC_LdStLQARX, []>, isPPC64;
352 isPPC64, isRecordForm;
356 "ldat $RST, $RA, $RB", IIC_LdStLoad>, isPPC64,
367 isPPC64, isRecordForm;
427 "stdat $RST, $RA, $RB", IIC_LdStStore>, isPPC64,
707 "ldx $RST, $RA, $RB", IIC_LdStLD, []>, isPPC64;
738 "stdx $RST, $RA, $RB", IIC_LdStSTD, []>, isPPC64,
839 "ldx $RST, $RA, $RB", IIC_LdStLD, []>, isPPC64;
860 "stdx $RST, $RA, $RB", IIC_LdStSTD, []>, isPPC64,
887 "cmpd $BF, $RA, $RB", IIC_IntCompare>, isPPC64;
[all …]
H A DPPCSubtarget.h176 bool isPPC64() const;
198 if (isPPC64()) in getRedZoneSize()
223 bool is64BitELFABI() const { return isSVR4ABI() && isPPC64(); } in is64BitELFABI()
224 bool is32BitELFABI() const { return isSVR4ABI() && !isPPC64(); } in is32BitELFABI()
253 MVT getScalarIntVT() const { return isPPC64() ? MVT::i64 : MVT::i32; } in getScalarIntVT()
H A DPPCTOCRegDeps.cpp102 const bool isPPC64 = in processBlock() local
103 MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in processBlock()
104 const unsigned TOCReg = isPPC64 ? PPC::X2 : PPC::R2; in processBlock()
H A DPPCSubtarget.cpp169 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
251 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); } in isPPC64() function in PPCSubtarget
254 return isPPC64() && hasPCRelativeMemops() && isELFv2ABI() && in isUsingPCRelativeCalls()
H A DPPCRegisterInfo.cpp97 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
98 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
99 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
172 if (TM.isPPC64()) in getPointerRegClass()
177 if (TM.isPPC64()) in getPointerRegClass()
186 if (!TM.isPPC64() && Subtarget.isAIXABI()) in getCalleeSavedRegs()
217 if (TM.isPPC64()) { in getCalleeSavedRegs()
237 if (TM.isPPC64()) { in getCalleeSavedRegs()
268 if (TM.isPositionIndependent() && !TM.isPPC64()) in getCalleeSavedRegs()
298 return TM.isPPC64() ? CSR_PPC64_RegMask : CSR_AIX32_RegMask; in getCallPreservedMask()
[all …]
H A DPPCInstrInfo.cpp93 STI.isPPC64() ? PPC::BLR8 : PPC::BLR), in PPCInstrInfo()
612 if (!(Subtarget.isPPC64() && Subtarget.hasP9Vector() && in shouldReduceRegisterPressure()
670 assert((Subtarget.isPPC64() && Subtarget.hasP9Vector() && in generateLoadForNewConst()
1263 bool isPPC64 = Subtarget.isPPC64(); in analyzeBranch() local
1329 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1340 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1397 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1411 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1477 bool isPPC64 = Subtarget.isPPC64(); in insertBranch() local
1485 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
[all …]
H A DPPCAsmPrinter.cpp706 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || in emitTlsCall()
707 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && in emitTlsCall()
710 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || in emitTlsCall()
711 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && in emitTlsCall()
719 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4; in emitTlsCall()
747 MCInstBuilder(Subtarget->isPPC64() ? Opcode in emitTlsCall()
813 const bool IsPPC64 = Subtarget->isPPC64(); in emitInstruction()
1773 if (!Subtarget->isPPC64()) in emitInstruction()
1920 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || in emitStartOfAsmFile()
1949 if (!Subtarget->isPPC64() && in emitFunctionEntryLabel()
[all …]
H A DPPCISelLowering.cpp182 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering() local
183 setMinStackArgumentAlignment(isPPC64 ? Align(8) : Align(4)); in PPCTargetLowering()
211 if (isPPC64) in PPCTargetLowering()
278 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
487 (Subtarget.hasP9Vector() && isPPC64) ? Custom : Expand); in PPCTargetLowering()
567 if (Subtarget.hasDirectMove() && isPPC64) { in PPCTargetLowering()
712 if (Subtarget.hasLFIWAX() || isPPC64) { in PPCTargetLowering()
1000 if (!DisableP10StoreForward && isPPC64 && !Subtarget.isLittleEndian()) { in PPCTargetLowering()
1024 if (Subtarget.hasDirectMove() && isPPC64) { in PPCTargetLowering()
1325 setOperationAction(ISD::SELECT_CC, MVT::i64, isPPC64 ? Custom : Expand); in PPCTargetLowering()
[all …]
H A DPPCCTRLoops.cpp237 Start->getParent()->getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in expandNormalLoops()
313 Start->getParent()->getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in expandCTRLoops()
H A DPPCTargetMachine.h74 bool isPPC64() const { in isPPC64() function
H A DPPCCallingConv.td51 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
52 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
73 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
74 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
H A DPPCISelDAGToDAG.cpp4055 if (TM.getOptLevel() == CodeGenOptLevel::None || !TM.isPPC64()) in tryIntCompareInGPR()
4478 bool isPPC64 = (PtrVT == MVT::i64); in trySETCC() local
4500 if (isPPC64) break; in trySETCC()
4528 if (isPPC64) break; in trySETCC()
4538 if (isPPC64) break; in trySETCC()
4916 SDValue DecrementOps[] = {Subtarget->isPPC64() ? getI64Imm(1, DecrementLoc) in trySelectLoopCountIntrinsic()
4919 Subtarget->isPPC64() ? PPC::DecreaseCTR8loop : PPC::DecreaseCTRloop; in trySelectLoopCountIntrinsic()
5492 if (Subtarget->isPPC64() || !TM.isPositionIndependent() || in Select()
5694 bool IsPPC64 = Subtarget->isPPC64(); in Select()
5717 bool IsPPC64 = Subtarget->isPPC64(); in Select()
[all …]
H A DPPCTargetTransformInfo.cpp299 if (ST->isPPC64() && in getIntImmCostInst()
397 HWLoopInfo.CountType = TM.isPPC64() ? in isHardwareLoopProfitable()
491 return TypeSize::getFixed(ST->isPPC64() ? 64 : 32); in getRegisterBitWidth()
H A DPPCBoolRetToInt.cpp93 Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext()) in translate()
H A DPPCTLSDynamicCall.cpp50 bool Is64Bit = Subtarget.isPPC64(); in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp158 bool isPPC64 = in createPPCMCRegisterInfo() local
160 unsigned Flavour = isPPC64 ? 0 : 1; in createPPCMCRegisterInfo()
161 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; in createPPCMCRegisterInfo()
186 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCAsmInfo() local
191 MAI = new PPCXCOFFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
193 MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
196 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; in createPPCMCAsmInfo()
H A DPPCAsmBackend.cpp230 bool Is64 = TT.isPPC64(); in createObjectTargetWriter()
256 if (TT.isPPC64()) { in getFixupKind()
H A DPPCMCCodeEmitter.cpp437 bool isPPC64 = TT.isPPC64(); in getTLSRegEncoding() local
438 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
H A DPPCInstPrinter.cpp463 if (!TT.isPPC64()) in printBranchOperand()
488 if (!TT.isPPC64()) in printAbsBranchOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp106 bool isPPC64() const { return IsPPC64; } in isPPC64() function in __anon49f2f9030111::PPCAsmParser
147 IsPPC64(STI.getTargetTriple().isPPC64()) { in PPCAsmParser()
244 bool isPPC64() const { return IsPPC64; } in isPPC64() function
490 if (isPPC64()) in addRegGxRCOperands()
497 if (isPPC64()) in addRegGxRCNoR0Operands()
1336 RegNo = isPPC64() ? PPC::LR8 : PPC::LR; in matchRegisterName()
1339 RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR; in matchRegisterName()
1344 RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal]; in matchRegisterName()
1465 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in parseOperand()
1486 Operands.push_back(PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64())); in parseOperand()
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Architecture/PPC64/
H A DArchitecturePPC64.cpp36 if (arch.GetTriple().isPPC64() && in Create()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/PPC64/
H A DEmulateInstructionPPC64.cpp52 if (arch.GetTriple().isPPC64()) in CreateInstance()
59 return arch.GetTriple().isPPC64(); in SetTargetTriple()
/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/
H A DPPCLinux.cpp87 if (!Triple.isLittleEndian() || !Triple.isPPC64()) in SupportIEEEFloat128()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp187 if (!STI.hasDirectMove() || !STI.isPPC64() || !STI.hasFPCVT()) in selectIntToFP()
214 if (!STI.hasDirectMove() || !STI.isPPC64() || !STI.hasFPCVT()) in selectFPToInt()
657 if (!STI.isPPC64() || !STI.isLittleEndian()) in selectConstantPool()

12