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Searched refs:isPPC64 (Results 1 – 25 of 45) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp45 return STI.isPPC64() ? 16 : 8; in computeReturnSaveOffset()
47 return STI.isPPC64() ? 16 : 4; in computeReturnSaveOffset()
52 return STI.isPPC64() ? 40 : 20; in computeTOCSaveOffset()
58 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
62 if (STI.isAIXABI() || STI.isPPC64()) in computeLinkageSize()
63 return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4); in computeLinkageSize()
75 return STI.isPPC64() ? -16U : -8U; in computeBasePointerSaveOffset()
79 return (STI.isAIXABI() && !STI.isPPC64()) ? 4 : 8; in computeCRSaveOffset()
243 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
448 Register R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0; in findScratchRegister()
[all …]
H A DPPCInstr64Bit.td340 "lqarx $RST, $addr", IIC_LdStLQARX, []>, isPPC64;
352 isPPC64, isRecordForm;
356 "ldat $RST, $RA, $RB", IIC_LdStLoad>, isPPC64,
367 isPPC64, isRecordForm;
427 "stdat $RST, $RA, $RB", IIC_LdStStore>, isPPC64,
707 "ldx $RST, $RA, $RB", IIC_LdStLD, []>, isPPC64;
738 "stdx $RST, $RA, $RB", IIC_LdStSTD, []>, isPPC64,
839 "ldx $RST, $RA, $RB", IIC_LdStLD, []>, isPPC64;
860 "stdx $RST, $RA, $RB", IIC_LdStSTD, []>, isPPC64,
887 "cmpd $BF, $RA, $RB", IIC_IntCompare>, isPPC64;
[all …]
H A DPPCTOCRegDeps.cpp112 const bool isPPC64 = in processBlock() local
113 MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in processBlock()
114 const unsigned TOCReg = isPPC64 ? PPC::X2 : PPC::R2; in processBlock()
H A DPPCSubtarget.cpp164 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
246 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); } in isPPC64() function in PPCSubtarget
249 return isPPC64() && hasPCRelativeMemops() && isELFv2ABI() && in isUsingPCRelativeCalls()
H A DPPCSubtarget.h172 bool isPPC64() const;
194 if (isPPC64()) in getRedZoneSize()
219 bool is64BitELFABI() const { return isSVR4ABI() && isPPC64(); } in is64BitELFABI()
220 bool is32BitELFABI() const { return isSVR4ABI() && !isPPC64(); } in is32BitELFABI()
H A DPPCRegisterInfo.cpp99 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
100 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
101 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
174 if (TM.isPPC64()) in getPointerRegClass()
179 if (TM.isPPC64()) in getPointerRegClass()
188 if (!TM.isPPC64() && Subtarget.isAIXABI()) in getCalleeSavedRegs()
219 if (TM.isPPC64()) { in getCalleeSavedRegs()
239 if (TM.isPPC64()) { in getCalleeSavedRegs()
270 if (TM.isPositionIndependent() && !TM.isPPC64()) in getCalleeSavedRegs()
300 return TM.isPPC64() ? CSR_PPC64_RegMask : CSR_AIX32_RegMask; in getCallPreservedMask()
[all …]
H A DPPCInstrInfo.cpp95 STI.isPPC64() ? PPC::BLR8 : PPC::BLR), in PPCInstrInfo()
614 if (!(Subtarget.isPPC64() && Subtarget.hasP9Vector() && in shouldReduceRegisterPressure()
672 assert((Subtarget.isPPC64() && Subtarget.hasP9Vector() && in generateLoadForNewConst()
1265 bool isPPC64 = Subtarget.isPPC64(); in analyzeBranch() local
1331 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1342 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1399 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1413 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1479 bool isPPC64 = Subtarget.isPPC64(); in insertBranch() local
1487 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
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H A DPPCISelLowering.cpp179 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering() local
180 setMinStackArgumentAlignment(isPPC64 ? Align(8) : Align(4)); in PPCTargetLowering()
262 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
265 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
268 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
272 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
275 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
279 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
282 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
286 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
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H A DPPCAsmPrinter.cpp702 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || in EmitTlsCall()
703 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && in EmitTlsCall()
706 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || in EmitTlsCall()
707 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && in EmitTlsCall()
715 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4; in EmitTlsCall()
744 MCInstBuilder(Subtarget->isPPC64() ? Opcode in EmitTlsCall()
804 const bool IsPPC64 = Subtarget->isPPC64(); in emitInstruction()
1795 if (!Subtarget->isPPC64()) in emitInstruction()
1942 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || in emitStartOfAsmFile()
1971 if (!Subtarget->isPPC64() && in emitFunctionEntryLabel()
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H A DPPCTargetMachine.h70 bool isPPC64() const { in isPPC64() function
H A DPPCCTRLoops.cpp243 Start->getParent()->getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in expandNormalLoops()
320 Start->getParent()->getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in expandCTRLoops()
H A DPPCCallingConv.td53 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
54 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
75 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
76 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
H A DPPCTargetTransformInfo.cpp300 if (ST->isPPC64() && in getIntImmCostInst()
394 HWLoopInfo.CountType = TM.isPPC64() ? in isHardwareLoopProfitable()
491 return TypeSize::getFixed(ST->isPPC64() ? 64 : 32); in getRegisterBitWidth()
1022 if ((!ST->hasP9Vector() && !ST->hasP10Vector()) || !ST->isPPC64()) in hasActiveVectorLength()
H A DPPCISelDAGToDAG.cpp4056 if (TM.getOptLevel() == CodeGenOptLevel::None || !TM.isPPC64()) in tryIntCompareInGPR()
4479 bool isPPC64 = (PtrVT == MVT::i64); in trySETCC() local
4501 if (isPPC64) break; in trySETCC()
4529 if (isPPC64) break; in trySETCC()
4539 if (isPPC64) break; in trySETCC()
4917 SDValue DecrementOps[] = {Subtarget->isPPC64() ? getI64Imm(1, DecrementLoc) in trySelectLoopCountIntrinsic()
4920 Subtarget->isPPC64() ? PPC::DecreaseCTR8loop : PPC::DecreaseCTRloop; in trySelectLoopCountIntrinsic()
5681 bool IsPPC64 = Subtarget->isPPC64(); in Select()
5704 bool IsPPC64 = Subtarget->isPPC64(); in Select()
5829 bool isPPC64 = (PtrVT == MVT::i64); in Select() local
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H A DPPCBoolRetToInt.cpp96 Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext()) in translate()
H A DPPCTLSDynamicCall.cpp54 bool Is64Bit = Subtarget.isPPC64(); in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp156 bool isPPC64 = in createPPCMCRegisterInfo() local
158 unsigned Flavour = isPPC64 ? 0 : 1; in createPPCMCRegisterInfo()
159 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; in createPPCMCRegisterInfo()
184 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCAsmInfo() local
189 MAI = new PPCXCOFFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
191 MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
194 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; in createPPCMCAsmInfo()
H A DPPCAsmBackend.cpp224 bool Is64 = TT.isPPC64(); in createObjectTargetWriter()
250 if (TT.isPPC64()) { in getFixupKind()
H A DPPCMCCodeEmitter.cpp441 bool isPPC64 = TT.isPPC64(); in getInstSizeInBytes()
442 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getInstSizeInBytes()
347 bool isPPC64 = TT.isPPC64(); getTLSRegEncoding() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp104 bool isPPC64() const { return IsPPC64; } in isPPC64() function in __anon49f2f9030111::PPCAsmParser
148 IsPPC64 = TheTriple.isPPC64(); in PPCAsmParser()
245 bool isPPC64() const { return IsPPC64; } in isPPC64() function
488 if (isPPC64()) in addRegGxRCOperands()
495 if (isPPC64()) in addRegGxRCNoR0Operands()
1303 RegNo = isPPC64() ? PPC::LR8 : PPC::LR; in MatchRegisterName()
1306 RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR; in MatchRegisterName()
1313 RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal]; in MatchRegisterName()
1552 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1573 Operands.push_back(PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64())); in ParseOperand()
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Architecture/PPC64/
H A DArchitecturePPC64.cpp36 if (arch.GetTriple().isPPC64() && in Create()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/PPC64/
H A DEmulateInstructionPPC64.cpp52 if (arch.GetTriple().isPPC64()) in CreateInstance()
59 return arch.GetTriple().isPPC64(); in SetTargetTriple()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DNativeProcessSoftwareSingleStep.cpp106 if (arch.IsMIPS() || arch.GetTriple().isPPC64() || in GetSoftwareBreakpointSize()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp187 if (!STI.hasDirectMove() || !STI.isPPC64() || !STI.hasFPCVT()) in selectIntToFP()
214 if (!STI.hasDirectMove() || !STI.isPPC64() || !STI.hasFPCVT()) in selectFPToInt()
657 if (!STI.isPPC64() || !STI.isLittleEndian()) in selectConstantPool()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DRuntimeLibcalls.cpp288 if (!TT.isPPC64()) { in initLibcalls()

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