Lines Matching refs:isPPC64
99 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
100 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
101 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
174 if (TM.isPPC64()) in getPointerRegClass()
179 if (TM.isPPC64()) in getPointerRegClass()
188 if (!TM.isPPC64() && Subtarget.isAIXABI()) in getCalleeSavedRegs()
219 if (TM.isPPC64()) { in getCalleeSavedRegs()
239 if (TM.isPPC64()) { in getCalleeSavedRegs()
270 if (TM.isPositionIndependent() && !TM.isPPC64()) in getCalleeSavedRegs()
300 return TM.isPPC64() ? CSR_PPC64_RegMask : CSR_AIX32_RegMask; in getCallPreservedMask()
301 return TM.isPPC64() ? CSR_AIX64_VSRP_RegMask : CSR_AIX32_VSRP_RegMask; in getCallPreservedMask()
303 return TM.isPPC64() in getCallPreservedMask()
313 if (TM.isPPC64()) in getCallPreservedMask()
327 if (TM.isPPC64()) in getCallPreservedMask()
391 if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm()) in getReservedRegs()
402 if (TM.isPPC64()) in getReservedRegs()
747 bool LP64 = TM.isPPC64(); in lowerDynamicAlloc()
807 bool LP64 = TM.isPPC64(); in prepareDynamicAlloca()
893 bool LP64 = TM.isPPC64(); in lowerPrepareProbedAlloca()
938 bool is64Bit = TM.isPPC64(); in lowerDynamicAreaOffset()
965 bool LP64 = TM.isPPC64(); in lowerCRSpilling()
1010 bool LP64 = TM.isPPC64(); in lowerCRRestore()
1054 bool LP64 = TM.isPPC64(); in lowerCRBitSpilling()
1172 bool LP64 = TM.isPPC64(); in lowerCRBitRestore()
1730 bool is64Bit = TM.isPPC64(); in eliminateFrameIndex()
1818 if (!TM.isPPC64()) in getFrameRegister()
1829 if (TM.isPPC64()) in getBaseRegister()
1902 unsigned ADDriOpc = TM.isPPC64() ? PPC::ADDI8 : PPC::ADDI; in materializeFrameBaseRegister()