| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenInstruction.h | 246 bool isMoveReg : 1; variable
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| H A D | CodeGenInstruction.cpp | 440 isMoveReg = R->getValueAsBit("isMoveReg"); in CodeGenInstruction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 286 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg() function
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | X86FoldTablesEmitter.cpp | 481 BaseDef ? Target.getInstruction(BaseDef).isMoveReg : RegInst->isMoveReg; in addEntryWithFlags()
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| H A D | InstrInfoEmitter.cpp | 1141 if (Inst.isMoveReg) in emitRecord()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrFPU.td | 166 let isMoveReg = 1;
173 let isMoveReg = 1;
590 let isMoveReg = 1 in {
594 } // isMoveReg
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| H A D | Mips16InstrInfo.cpp | 99 if (MI.isMoveReg()) in isCopyInstrImpl()
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| H A D | MicroMipsInstrInfo.td | 243 let isMoveReg = 1;
408 let isMoveReg = 1;
415 let isMoveReg = 1;
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| H A D | MicroMipsInstrFPU.td | 132 let isMoveReg = 1;
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| H A D | Mips16InstrInfo.td | 873 let isMoveReg = 1;
885 let isMoveReg = 1;
897 let isMoveReg = 0;
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| H A D | MipsSEInstrInfo.cpp | 206 if (MI.isMoveReg() || isORCopyInst(MI)) in isCopyInstrImpl()
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| H A D | MipsDSPInstrInfo.td | 508 bit isMoveReg = 1;
518 bit isMoveReg = 1;
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| H A D | MipsMSAInstrInfo.td | 1738 bit isMoveReg = 1;
1833 bit isMoveReg = 1;
2387 bit isMoveReg = 1;
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| H A D | Mips64InstrInfo.td | 417 let isMoveReg = 1 in {
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| H A D | MipsInstrInfo.td | 1745 let isMoveReg = 1;
1758 let isMoveReg = 1;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrMMX.td | 200 let SchedRW = [WriteVecMove], hasSideEffects = 0, isMoveReg = 1 in {
206 } // SchedRW, hasSideEffects, isMoveReg
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| H A D | X86InstrMisc.td | 360 let hasSideEffects = 0, isMoveReg = 1 in {
538 SchedRW = [WriteMove], isMoveReg = 1 in {
583 let hasSideEffects = 0, isMoveReg = 1 in
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1029 bool isMoveReg(QueryType Type = IgnoreBundle) const {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZfh.td | 108 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveReg = 1,
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| H A D | RISCVInstrInfoC.td | 545 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isMoveReg = 1,
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| H A D | RISCVInstrInfoF.td | 347 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveReg = 1,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 1161 let isMoveReg = 1 in {
1171 } // isMoveReg
1193 let isMoveReg = 1 in {
1240 } // isMoveReg
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| H A D | ARMInstrThumb.td | 1217 let hasSideEffects = 0, isMoveReg = 1 in {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFP.td | 47 let isMoveReg = 1 in {
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| H A D | SystemZInstrInfo.cpp | 2356 if (MI.isMoveReg()) in isCopyInstrImpl()
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