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Searched refs:isMoveReg (Results 1 – 25 of 30) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h285 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg() function
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenInstruction.h248 bool isMoveReg : 1; variable
H A DCodeGenInstruction.cpp443 isMoveReg = R->getValueAsBit("isMoveReg"); in CodeGenInstruction()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86FoldTablesEmitter.cpp481 BaseDef ? Target.getInstruction(BaseDef).isMoveReg : RegInst->isMoveReg; in addEntryWithFlags()
H A DInstrInfoEmitter.cpp1226 if (Inst.isMoveReg) in emitRecord()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td166 let isMoveReg = 1;
173 let isMoveReg = 1;
590 let isMoveReg = 1 in {
594 } // isMoveReg
H A DMips16InstrInfo.cpp101 if (MI.isMoveReg()) in isCopyInstrImpl()
H A DMicroMipsInstrInfo.td243 let isMoveReg = 1;
408 let isMoveReg = 1;
415 let isMoveReg = 1;
H A DMicroMipsInstrFPU.td132 let isMoveReg = 1;
H A DMips16InstrInfo.td873 let isMoveReg = 1;
885 let isMoveReg = 1;
897 let isMoveReg = 0;
H A DMipsSEInstrInfo.cpp208 if (MI.isMoveReg() || isORCopyInst(MI)) in isCopyInstrImpl()
H A DMipsDSPInstrInfo.td508 bit isMoveReg = 1;
518 bit isMoveReg = 1;
H A DMipsMSAInstrInfo.td1791 bit isMoveReg = 1;
1886 bit isMoveReg = 1;
2440 bit isMoveReg = 1;
H A DMips64InstrInfo.td417 let isMoveReg = 1 in {
H A DMipsInstrInfo.td1733 let isMoveReg = 1;
1746 let isMoveReg = 1;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrMMX.td200 let SchedRW = [WriteVecMove], hasSideEffects = 0, isMoveReg = 1 in {
206 } // SchedRW, hasSideEffects, isMoveReg
H A DX86InstrMisc.td360 let hasSideEffects = 0, isMoveReg = 1 in {
538 SchedRW = [WriteMove], isMoveReg = 1 in {
583 let hasSideEffects = 0, isMoveReg = 1 in
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstr.h1031 bool isMoveReg(QueryType Type = IgnoreBundle) const {
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td1146 let isMoveReg = 1 in {
1156 } // isMoveReg
1178 let isMoveReg = 1 in {
1225 } // isMoveReg
H A DARMInstrThumb.td1217 let hasSideEffects = 0, isMoveReg = 1 in {
H A DARMBaseInstrInfo.cpp1067 if (!MI.isMoveReg() || in isCopyInstrImpl()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoC.td543 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isMoveReg = 1,
H A DRISCVInstrInfoV.td1693 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isMoveReg = 1,
H A DRISCVInstrInfo.cpp1551 if (MI.isMoveReg()) in isCopyInstrImpl()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td634 bit isMoveReg = false; // Is this instruction a move register instruction?

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