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Searched refs:isInt (Results 1 – 25 of 229) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParserCommon.h17 return isInt<8>(Value) || in isImmSExti16i8Value()
18 (isUInt<16>(Value) && isInt<8>(static_cast<int16_t>(Value))); in isImmSExti16i8Value()
22 return isInt<8>(Value) || in isImmSExti32i8Value()
23 (isUInt<32>(Value) && isInt<8>(static_cast<int32_t>(Value))); in isImmSExti32i8Value()
27 return isInt<8>(Value); in isImmSExti64i8Value()
31 return isInt<32>(Value); in isImmSExti64i32Value()
35 return isUInt<8>(Value) || isInt<8>(Value); in isImmUnsignedi8Value()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp32 Compressed = isInt<6>(Instr.getImm()); in getInstSeqCost()
55 (!isInt<32>(Val) || Val == 0x800)) { in generateInstSeqImpl()
60 if (isInt<32>(Val)) { in generateInstSeqImpl()
113 if (!isInt<32>(Val)) { in generateInstSeqImpl()
120 if (ShiftAmount > 12 && !isInt<12>(Val)) { in generateInstSeqImpl()
121 if (isInt<32>((uint64_t)Val << 12)) { in generateInstSeqImpl()
137 if (isUInt<32>((uint64_t)Val) && !isInt<32>((uint64_t)Val) && in generateInstSeqImpl()
242 isInt<6>(ShiftedVal) && !STI.hasFeature(RISCV::TuneLUIADDIFusion); in generateInstSeq()
363 if ((Val % 3) == 0 && isInt<32>(Val / 3)) { in generateInstSeq()
366 } else if ((Val % 5) == 0 && isInt<32>(Val / 5)) { in generateInstSeq()
[all …]
H A DRISCVAsmBackend.cpp171 return !isInt<13>(Offset); in fixupNeedsRelaxationAdvanced()
428 if (!isInt<12>(Value)) { in adjustFixupValue()
443 if (!isInt<21>(Value)) in adjustFixupValue()
460 if (!isInt<13>(Value)) in adjustFixupValue()
487 if (!isInt<12>(Value)) in adjustFixupValue()
503 if (!isInt<9>(Value)) in adjustFixupValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsAsmBackend.cpp82 if (!isInt<16>(Value)) { in adjustFixupValue()
92 if (!isInt<19>(Value)) { in adjustFixupValue()
131 if (!isInt<7>(Value)) { in adjustFixupValue()
141 if (!isInt<10>(Value)) { in adjustFixupValue()
151 if (!isInt<16>(Value)) { in adjustFixupValue()
160 if (!isInt<18>(Value)) { in adjustFixupValue()
173 if (!isInt<18>(Value)) { in adjustFixupValue()
182 if (!isInt<21>(Value)) { in adjustFixupValue()
191 if (!isInt<26>(Value)) { in adjustFixupValue()
200 if (!isInt<26>(Value)) { in adjustFixupValue()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaAsmBackend.cpp92 if (!isInt<6>(Value)) in adjustFixupValue()
100 if (!isInt<8>(Value)) in adjustFixupValue()
105 if (!isInt<12>(Value)) in adjustFixupValue()
110 if (!isInt<18>(Value)) in adjustFixupValue()
115 if (!isInt<20>(Value)) in adjustFixupValue()
124 if (!isInt<18>(Value) && (Value & 0x20000)) in adjustFixupValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp319 return isInt<18>(BrOffset); in isBranchOffsetInRange()
335 return isInt<17>(BrOffset); in isBranchOffsetInRange()
339 return isInt<11>(BrOffset); in isBranchOffsetInRange()
343 return isInt<8>(BrOffset); in isBranchOffsetInRange()
348 return isInt<28>(BrOffset); in isBranchOffsetInRange()
372 return isInt<18>(BrOffset); in isBranchOffsetInRange()
376 return isInt<23>(BrOffset); in isBranchOffsetInRange()
380 return isInt<11>(BrOffset); in isBranchOffsetInRange()
384 return isInt<8>(BrOffset); in isBranchOffsetInRange()
388 return isInt<27>(BrOffset); in isBranchOffsetInRange()
[all …]
H A DMips16InstrInfo.cpp232 if (isInt<16>(-Remainder)) in makeFrame()
258 if (isInt<16>(Remainder)) in restoreFrame()
312 if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16> in adjustStackPtr()
483 return isInt<16>(Amount); in validImmediate()
486 return isInt<16>(Amount); in validImmediate()
487 return isInt<15>(Amount); in validImmediate()
/freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/
H A Dppc64.h386 if (LLVM_UNLIKELY(!isInt<32>(Value))) {
407 if (LLVM_UNLIKELY(!isInt<32>(Value))) {
416 if (LLVM_UNLIKELY(!isInt<16>(Value))) {
431 if (LLVM_UNLIKELY(!isInt<32>(Value))) {
439 if (LLVM_UNLIKELY(!isInt<26>(Value))) {
462 if (!LLVM_UNLIKELY(isInt<34>(Value)))
474 if (LLVM_UNLIKELY(!isInt<32>(Value))) {
482 if (LLVM_UNLIKELY(!isInt<32>(Value))) {
H A Dx86_64.h433 if (LLVM_LIKELY(isInt<32>(Value))) in applyFixup()
467 if (LLVM_LIKELY(isInt<32>(Value))) in applyFixup()
482 if (LLVM_LIKELY(isInt<32>(Value))) in applyFixup()
491 if (LLVM_LIKELY(isInt<8>(Value))) in applyFixup()
506 if (LLVM_LIKELY(isInt<32>(Value))) in applyFixup()
H A Dloongarch.h196 if (!isInt<28>(Value)) in applyFixup()
212 if (!isInt<32>(Value)) in applyFixup()
219 if (!isInt<32>(Value)) in applyFixup()
234 if (!isInt<32>(PageDelta)) in applyFixup()
H A Daarch64.h515 if (!isInt<21>(Delta)) in applyFixup()
527 if (!isInt<21>(Delta)) in applyFixup()
546 if (!isInt<16>(Delta)) in applyFixup()
564 if (!isInt<21>(Delta)) in applyFixup()
579 if (!isInt<33>(PageDelta)) in applyFixup()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiTargetTransformInfo.h67 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
69 if (isInt<21>(Imm.getZExtValue())) in getIntImmCost()
71 if (isInt<32>(Imm.getSExtValue())) { in getIntImmCost()
H A DLanaiISelDAGToDAG.cpp91 return isInt<21>(CN.getSExtValue()) && ((CN.getSExtValue() & 0x3) == 0); in canBeRepresentedAsSls()
135 if (isInt<16>(CN->getSExtValue())) { in selectAddrRiSpls()
148 if (isInt<10>(CN->getSExtValue())) { in selectAddrRiSpls()
179 if ((RiMode && isInt<16>(CN->getSExtValue())) || in selectAddrRiSpls()
180 (!RiMode && isInt<10>(CN->getSExtValue()))) { in selectAddrRiSpls()
265 if (isInt<16>(CN->getSExtValue())) in selectAddrRr()
H A DLanaiRegisterInfo.cpp165 if ((isSPLSOpcode(MI.getOpcode()) && !isInt<10>(Offset)) || in eliminateFrameIndex()
166 !isInt<16>(Offset)) { in eliminateFrameIndex()
181 if (!isInt<16>(Offset)) { in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A Daarch32.cpp482 if (!isInt<32>(Value)) in getEdgeKindName()
502 if (!isInt<31>(Value)) in getCPUArchName()
543 if (!isInt<26>(Value))
573 if (!isInt<26>(Value))
619 if (!isInt<25>(Value))
623 if (!isInt<22>(Value))
652 if (!isInt<25>(Value))
656 if (!isInt<22>(Value))
H A Dx86_64.cpp110 bool DisplacementInRangeForImmS32 = isInt<32>(Displacement); in optimizeGOTAndStubAccesses()
180 if (isInt<32>(Displacement)) { in optimizeGOTAndStubAccesses()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonOperands.td13 def s8_0Imm64Pred : PatLeaf<(i64 imm), [{ return isInt<8>(N->getSExtValue()); }]>;
20 return isInt<32>(v);
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp67 else if (isInt<12>(AbsAmount)) in generateStackAdjustment()
139 else if (isInt<12>(VarArgsBytes)) in emitPrologue()
284 else if (isInt<12>(MoveAmount)) in emitEpilogue()
299 else if (isInt<12>(4 * StackSlotsUsedByFunclet)) in emitEpilogue()
326 else if (isInt<12>(VarArgsBytes)) in emitEpilogue()
456 else if (isInt<12>(NumBytes)) in emitRegUpdate()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.cpp189 if (!STI.is64Bit() && !isInt<32>(Val)) in movImm()
338 return isInt<18>(BrOffset); in isBranchOffsetInRange()
343 return isInt<23>(BrOffset); in isBranchOffsetInRange()
346 return isInt<28>(BrOffset); in isBranchOffsetInRange()
438 if (!isInt<32>(BrOffset)) in insertIndirectBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kAsmBackend.cpp171 if (!isInt<16>(Value)) { in fixupNeedsRelaxation()
181 return Value == 0 || !isInt<8>(Value); in fixupNeedsRelaxation()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVCodeGenPrepare.cpp97 if (!isUInt<32>(C) || isInt<12>(C) || !isInt<12>(SignExtend64<32>(C))) in visitAnd()
H A DRISCVISelDAGToDAG.cpp623 if (isInt<12>(Val)) in tryShrinkShlLogicImm()
632 if (isInt<32>(Val) && N0.getOpcode() == ISD::SIGN_EXTEND_INREG && in tryShrinkShlLogicImm()
654 if (!isInt<12>(ShiftedVal)) in tryShrinkShlLogicImm()
774 if (isInt<5>(Offset >> Shift) && ((Offset % (1LL << Shift)) == 0)) in tryIndexedLoad()
908 if (isUInt<8>(Imm) && isInt<6>(SignExtend64<8>(Imm)) && hasAllBUsers(Node)) in Select()
912 if (isUInt<16>(Imm) && isInt<12>(SignExtend64<16>(Imm)) && in Select()
917 if (!isInt<32>(Imm) && isUInt<32>(Imm) && hasAllWUsers(Node)) in Select()
1221 const bool isC1ANDI = isInt<12>(C1); in Select()
1253 bool IsCANDI = isInt<6>(N1C->getSExtValue()); in Select()
1485 isInt<12>(C2) || in Select()
[all …]
H A DRISCVInstrInfoZb.td87 return !isInt<12>(Imm) && isPowerOf2_64(~Imm);
88 return !isInt<12>(Imm) && isPowerOf2_32(~Imm);
94 return !isInt<12>(Imm) && isPowerOf2_64(Imm);
95 return !isInt<12>(Imm) && isPowerOf2_32(Imm);
104 if (isInt<12>(N->getSExtValue()))
122 if (isInt<12>(N->getSExtValue()))
139 if (isInt<12>(N->getSExtValue()))
164 if (isInt<12>(N->getSExtValue()))
181 return !isInt<13>(C) && !isShiftedInt<20, 12>(C) && isShiftedInt<12, 2>(C);
190 return !isInt<14>(C) && !isShiftedInt<20, 12>(C) && isShiftedInt<12, 3>(C);
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td396 return SImm.has_value() && isInt<32>(-*SImm);
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp162 if (!isInt<21>(SignedValue)) in adjustFixupValue()
168 if (!isInt<21>(SignedValue)) in adjustFixupValue()
176 if (!isInt<21>(SignedValue)) in adjustFixupValue()
312 if (!isInt<16>(SignedValue)) in adjustFixupValue()
339 if (!isInt<28>(SignedValue)) in adjustFixupValue()

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