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/freebsd/sys/riscv/riscv/
H A Ddb_disasm.c353 int imm; in oprint() local
379 imm = ((insn >> 10) & 0x7) << 3; in oprint()
380 imm |= ((insn >> 5) & 0x3) << 6; in oprint()
381 if (imm & (1 << 8)) in oprint()
382 imm |= 0xffffff << 8; in oprint()
383 db_printf("%d", imm); in oprint()
386 imm = ((insn >> 10) & 0x7) << 3; in oprint()
387 imm |= ((insn >> 6) & 0x1) << 2; in oprint()
388 imm |= ((insn >> 5) & 0x1) << 6; in oprint()
389 if (imm & (1 << 8)) in oprint()
[all …]
H A Dsdt_machdep.c38 int32_t imm; in sdt_tracepoint_patch() local
45 imm = target - patchpoint; in sdt_tracepoint_patch()
46 imm = (imm & 0x100000) | in sdt_tracepoint_patch()
47 ((imm & 0x7fe) << 8) | in sdt_tracepoint_patch()
48 ((imm & 0x800) >> 2) | in sdt_tracepoint_patch()
49 ((imm & 0xff000) >> 12); in sdt_tracepoint_patch()
50 instr = (imm << 12) | MATCH_JAL; in sdt_tracepoint_patch()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoXwch.td83 (ins GPRCMem:$rs1, uimm5_with_predicate:$imm),
84 "qk.c.lbu", "$rd, ${imm}(${rs1})">,
86 bits<5> imm;
87 let Inst{12} = imm{0};
88 let Inst{11-10} = imm{4-3};
89 let Inst{6-5} = imm{2-1};
94 uimm5_with_predicate:$imm),
95 "qk.c.sb", "$rs2, ${imm}(${rs1})">,
97 bits<5> imm;
98 let Inst{12} = imm{0};
[all …]
H A DRISCVInstrInfoC.td244 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SPMem:$rs1, opnd:$imm),
245 OpcodeStr, "$rd, ${imm}(${rs1})">;
250 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SPMem:$rs1, opnd:$imm),
251 OpcodeStr, "$rs2, ${imm}(${rs1})">;
256 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRCMem:$rs1, opnd:$imm),
257 OpcodeStr, "$rd, ${imm}(${rs1})">;
262 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2,GPRCMem:$rs1, opnd:$imm),
263 OpcodeStr, "$rs2, ${imm}(${rs1})">;
268 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
269 OpcodeStr, "$rs1, $imm"> {
[all …]
H A DRISCVInstrInfoZc.td107 (ins GPRCMem:$rs1, uimm2:$imm),
108 OpcodeStr, "$rd, ${imm}(${rs1})"> {
109 bits<2> imm;
111 let Inst{6-5} = imm{0,1};
117 (ins GPRCMem:$rs1, uimm2_lsb0:$imm),
118 OpcodeStr, "$rd, ${imm}(${rs1})"> {
119 bits<2> imm;
121 let Inst{5} = imm{1};
127 (ins GPRC:$rs2, GPRCMem:$rs1, uimm2:$imm),
128 OpcodeStr, "$rs2, ${imm}(${rs1})"> {
[all …]
/freebsd/sys/cddl/dev/kinst/riscv/
H A Dkinst_isa.c72 uint64_t imm; in kinst_emulate() local
87 imm = 0; in kinst_emulate()
88 imm |= ((instr >> 21) & 0x03ff) << 1; in kinst_emulate()
89 imm |= ((instr >> 20) & 0x0001) << 11; in kinst_emulate()
90 imm |= ((instr >> 12) & 0x00ff) << 12; in kinst_emulate()
91 imm |= ((instr >> 31) & 0x0001) << 20; in kinst_emulate()
92 if (imm & 0x0000000000100000) in kinst_emulate()
93 imm |= 0xfffffffffff00000; in kinst_emulate()
96 frame->tf_sepc += imm; in kinst_emulate()
100 imm = (instr & IMM_MASK) >> IMM_SHIFT; in kinst_emulate()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrCDE.td115 !con(params.Iops1, (ins imm_13b:$imm), params.PredOp),
116 !strconcat(iname, params.PAsm, "\t$coproc, $Rd, $imm"),
118 bits<13> imm;
122 let Inst{21-16} = imm{12-7};
124 let Inst{7} = imm{6};
125 let Inst{5-0} = imm{5-0};
131 !con(params.Iops2, (ins imm_9b:$imm), params.PredOp),
132 !strconcat(iname, params.PAsm, "\t$coproc, $Rd, $Rn, $imm"),
134 bits<9> imm;
139 let Inst{21-20} = imm{8-7};
[all …]
H A DARMInstrThumb2.td56 def t2_so_reg : Operand<i32>, // reg imm
73 def t2_so_imm_not_XFORM : SDNodeXForm<imm, [{
79 def t2_so_imm_neg_XFORM : SDNodeXForm<imm, [{
87 def t2_so_imm_notSext16_XFORM : SDNodeXForm<imm, [{
115 def t2_so_imm_not : Operand<i32>, PatLeaf<(imm), [{
123 def t2_so_imm_notSext : Operand<i32>, PatLeaf<(imm), [{
149 def imm0_4095_neg : Operand<i32>, PatLeaf<(i32 imm), [{
155 def imm1_255_neg : PatLeaf<(i32 imm), [{
160 def imm0_255_not : PatLeaf<(i32 imm), [{
164 def lo5AllOne : PatLeaf<(i32 imm), [{
[all …]
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_cde.td65 !con((CDEIRInt<NAME> $cp), cgArgs, (? $imm))>;
68 cgArgs, (? $imm))>;
72 (seq !con((CDEIRInt<NAME # "d"> $cp), cgArgs, (? $imm)):$pair,
80 (? $imm)):$pair,
86 defm cx1 : CDE_CX_m<(args imm_13b:$imm), (args), (?)>;
87 defm cx2 : CDE_CX_m<(args imm_9b:$imm), (args u32:$n), (? $n)>;
88 defm cx3 : CDE_CX_m<(args imm_6b:$imm), (args u32:$n, u32:$m), (? $n, $m)>;
95 (bitcast !con((CDEIRInt<NAME, [f32]> $cp), cgArgs, (? $imm)),
99 (bitcast $acc, FScalar)), cgArgs, (? $imm)), Scalar)>;
103 (bitcast !con((CDEIRInt<NAME, [f64]> $cp), cgArgs, (? $imm)),
[all …]
/freebsd/sys/cddl/dev/kinst/aarch64/
H A Dkinst_isa.c25 uint64_t imm; in kinst_emulate() local
32 imm = (instr >> 29) & 0x3; in kinst_emulate()
33 imm |= ((instr >> 5) & 0x0007ffff) << 2; in kinst_emulate()
36 if (imm & 0x0000000000100000) in kinst_emulate()
37 imm |= 0xfffffffffff00000; in kinst_emulate()
38 frame->tf_x[reg] = frame->tf_elr + imm; in kinst_emulate()
41 imm <<= 12; in kinst_emulate()
42 if (imm & 0x0000000100000000) in kinst_emulate()
43 imm |= 0xffffffff00000000; in kinst_emulate()
44 frame->tf_x[reg] = (frame->tf_elr & ~0xfff) + imm; in kinst_emulate()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrAliases.td93 // b<cond> $imm
94 def : InstAlias<!strconcat(!strconcat("b", cond), " $imm"),
95 (BCOND brtarget:$imm, condVal)>;
97 // b<cond>,a $imm
98 def : InstAlias<!strconcat(!strconcat("b", cond), ",a $imm"),
99 (BCONDA brtarget:$imm, condVal)>;
101 // b<cond> %icc, $imm
102 def : InstAlias<!strconcat(!strconcat("b", cond), " %icc, $imm"),
103 (BPICC brtarget:$imm, condVal)>, Requires<[HasV9]>;
105 // b<cond>,pt %icc, $imm
[all …]
H A DSparcInstr64Bit.td69 def as_i32imm : SDNodeXForm<imm, [{
78 def uimm32 : PatLeaf<(imm), [{ return isUInt<32>(N->getZExtValue()); }]>;
83 def nimm33 : PatLeaf<(imm), [{
88 def HIX22 : SDNodeXForm<imm, [{
93 def LOX10 : SDNodeXForm<imm, [{
127 def HH22 : SDNodeXForm<imm, [{
132 def HM10 : SDNodeXForm<imm, [{
136 def : Pat<(i64 imm:$val),
152 def : Pat<(and i64:$lhs, (i64 simm13:$rhs)), (ANDri $lhs, imm:$rhs)>;
153 def : Pat<(or i64:$lhs, (i64 simm13:$rhs)), (ORri $lhs, imm:$rhs)>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.td118 // Short jump targets have OtherVT type and are printed as pcrel imm values.
192 (MSP430selectcc GR8:$src, GR8:$src2, imm:$cc))]>;
196 (MSP430selectcc GR16:$src, GR16:$src2, imm:$cc))]>;
255 def Bi : I16ri<0b0100, (outs), (ins i16imm:$imm),
256 "br\t$imm",
257 [(brind tblockaddress:$imm)]>;
271 [(MSP430brcc bb:$dst, imm:$cond)]>;
285 (outs), (ins i16imm:$imm),
286 "call\t$imm", [(MSP430call imm
[all...]
H A DMSP430InstrFormats.td77 bits<16> imm;
78 let Inst{31-16} = imm;
88 bits<6> imm;
92 let Inst{11-8} = imm{3-0};
95 let Inst{5-4} = imm{5-4};
133 bits<16> imm;
136 let Inst{31-16} = imm;
147 bits<6> imm;
152 let Inst{11-8} = imm{3-0};
155 let Inst{5-4} = imm{5-4};
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td88 def i64immSExt32 : PatLeaf<(i64 imm),
90 def i32immSExt32 : PatLeaf<(i32 imm),
92 def i64immZExt32 : PatLeaf<(i64 imm),
112 def BPF_CC_EQ : PatLeaf<(i64 imm),
114 def BPF_CC_NE : PatLeaf<(i64 imm),
116 def BPF_CC_GE : PatLeaf<(i64 imm),
118 def BPF_CC_GT : PatLeaf<(i64 imm),
120 def BPF_CC_GTU : PatLeaf<(i64 imm),
122 def BPF_CC_GEU : PatLeaf<(i64 imm),
124 def BPF_CC_LE : PatLeaf<(i64 imm),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo16Instr.td133 (outs mGPR:$rz), (ins mGPR:$rx, uimm5:$imm)>;
135 (outs mGPR:$rz), (ins mGPR:$rx, uimm5_1:$imm)>;
137 (outs mGPR:$rz), (ins mGPR:$rx, uimm5_2:$imm)>;
139 (outs), (ins mGPR:$rz, mGPR:$rx, uimm5:$imm)>;
141 (outs), (ins mGPR:$rz, mGPR:$rx, uimm5_1:$imm)>;
143 (outs), (ins mGPR:$rz, mGPR:$rx, uimm5_2:$imm)>;
564 def : Pat<(i32 imm:$imm),
565 (OR16 (MOVI16 (uimm8SRL_0 imm:$imm)),
566 (OR16 (LSLI16 (MOVI16 (uimm8SRL_8 imm:$imm)), 8),
567 (OR16 (LSLI16 (MOVI16 (uimm8SRL_16 imm:$imm)), 16),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td64 def LO16 : SDNodeXForm<imm, [{
71 def HI16 : SDNodeXForm<imm, [{
76 def NEG : SDNodeXForm<imm, [{
80 def LO21 : SDNodeXForm<imm, [{
105 def immShift : Operand<i32>, PatLeaf<(imm), [{
113 def imm10 : Operand<i32>, PatLeaf<(imm), [{
119 def i32lo16z : Operand<i32>, PatLeaf<(i32 imm), [{
125 def i32neg16 : Operand<i32>, PatLeaf<(i32 imm), [{
132 def i32lo16s : Operand<i32>, PatLeaf<(i32 imm), [{
140 def i32lo16and : Operand<i32>, PatLeaf<(i32 imm), [{
[all …]
/freebsd/sys/arm64/arm64/
H A Ddisassem.c495 int shift, rm, rt, rd, rn, imm, sf, idx, option, scale, amount; in disasm() local
510 shift = rd = rm = rn = imm = idx = option = amount = scale = 0; in disasm()
542 arm64_disasm_read_token_sign_ext(i_ptr, insn, "IMM", &imm); in disasm()
544 arm64_disasm_read_token(i_ptr, insn, "IMM", &imm); in disasm()
546 imm <<= 2; in disasm()
600 if (imm != 0) in disasm()
601 di->di_printf(", %s #%d", shift_2[shift], imm); in disasm()
603 if (imm != 0 || shift != 0) in disasm()
604 di->di_printf(", #0x%x", imm); in disasm()
638 imm = imm << ((insn >> ARM_INSN_SIZE_OFFSET) & in disasm()
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DRISCVCInstructions.h164 uint16_t imm = ((inst >> 7) & 0x20) | ((inst >> 2) & 0x1f); in DecodeC_LI() local
165 if ((imm & 0x20) == 0) in DecodeC_LI()
166 return ADDI{rd, Rs{0}, uint32_t(imm)}; in DecodeC_LI()
167 return ADDI{rd, Rs{0}, uint32_t(int32_t(int8_t(imm | 0xc0)))}; in DecodeC_LI()
187 uint32_t imm = in DecodeC_LUI_ADDI16SP() local
189 if ((imm & 0x20000) == 0) in DecodeC_LUI_ADDI16SP()
190 return LUI{rd, imm}; in DecodeC_LUI_ADDI16SP()
191 return LUI{rd, uint32_t(int32_t(imm | 0xfffc0000))}; in DecodeC_LUI_ADDI16SP()
198 uint16_t imm = ((inst >> 7) & 0x20) | ((inst >> 2) & 0x1f); in DecodeC_ADDI() local
199 if ((imm & 0x20) == 0) in DecodeC_ADDI()
[all …]
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Df16cintrin.h68 #define _cvtss_sh(a, imm) __extension__ ({ \ argument
70 (imm)))[0]); })
95 #define _mm_cvtps_ph(a, imm) \ argument
96 ((__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm)))
138 #define _mm256_cvtps_ph(a, imm) \ argument
139 ((__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm)))
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLSXInstrInfo.td1192 def PseudoVREPLI_B : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1193 "vrepli.b", "$vd, $imm">;
1194 def PseudoVREPLI_H : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1195 "vrepli.h", "$vd, $imm">;
1196 def PseudoVREPLI_W : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1197 "vrepli.w", "$vd, $imm">;
1198 def PseudoVREPLI_D : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1199 "vrepli.d", "$vd, $imm">;
1264 def : Pat<(OpNode (v16i8 LSX128:$vj), (v16i8 (SplatPat_simm5 simm5:$imm))),
1265 (!cast<LAInst>(Inst#"_B") LSX128:$vj, simm5:$imm)>;
[all …]
H A DLoongArchLASXInstrInfo.td1059 def PseudoXVREPLI_B : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],
1060 "xvrepli.b", "$xd, $imm">;
1061 def PseudoXVREPLI_H : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],
1062 "xvrepli.h", "$xd, $imm">;
1063 def PseudoXVREPLI_W : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],
1064 "xvrepli.w", "$xd, $imm">;
1065 def PseudoXVREPLI_D : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [],
1066 "xvrepli.d", "$xd, $imm">;
1083 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm5:$imm)>;
1085 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm4:$imm)>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DSMEInstrFormats.td95 Pseudo<(outs), (ins MatrixIndexGPR32Op8_11:$Rs, imm_ty:$imm, multi_vector_ty:$Zn), []> {
102 …Pseudo<(outs), (ins tile_imm:$tile, MatrixIndexGPR32Op12_15:$Rs, imm_ty:$imm, multi_vector_ty:$Zn)…
109 Pseudo<(outs), (ins MatrixIndexGPR32Op8_11:$Rs, index_ty:$imm), []> {
116 … Pseudo<(outs vector_ty:$Zn), (ins tile_imm:$tile, MatrixIndexGPR32Op12_15:$Rs, imm_ty:$imm), []> {
246 : PstateWriteSimple<(ins svcr_op:$pstatefield, timm0_1:$imm), "msr",
247 "\t$pstatefield, $imm">,
250 bit imm;
253 let Inst{8} = imm;
529 (ins MatrixIndexGPR32Op12_15:$Rv, imm_ty:$imm, PPR3bAny:$Pg, GPR64sp:$Rn,
531 mnemonic, "\t\\{$ZAt[$Rv, $imm]\\}, $Pg/z, [$Rn, $Rm]">;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrAsmAlias.td421 // Disambiguate the mem/imm form of bt-without-a-suffix as btl.
423 def : InstAlias<"bt\t{$imm, $mem|$mem, $imm}",
424 (BT32mi8 i32mem:$mem, i32u8imm:$imm), 0, "att">;
425 def : InstAlias<"btc\t{$imm, $mem|$mem, $imm}",
426 (BTC32mi8 i32mem:$mem, i32u8imm:$imm), 0, "att">;
427 def : InstAlias<"btr\t{$imm, $mem|$mem, $imm}",
428 (BTR32mi8 i32mem:$mem, i32u8imm:$imm), 0, "att">;
429 def : InstAlias<"bts\t{$imm, $mem|$mem, $imm}",
430 (BTS32mi8 i32mem:$mem, i32u8imm:$imm), 0, "att">;
599 // "imul <imm>, B" is an alias for "imul <imm>, B, B".
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips64InstrInfo.td23 def immSExt10_64 : PatLeaf<(i64 imm),
26 def immZExt16_64 : PatLeaf<(i64 imm),
32 def Log2LO : SDNodeXForm<imm, [{
37 def Log2HI : SDNodeXForm<imm, [{
42 def PowerOf2LO : PatLeaf<(imm), [{
52 def PowerOf2HI : PatLeaf<(imm), [{
61 def PowerOf2LO_i32 : PatLeaf<(imm), [{
465 [(set RO:$rt, (Op RO:$rs, PosImm:$pos, imm:$lenm1))],
648 def : MipsPat<(i64 immZExt32Low16Zero:$imm),
649 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16)>, ISA_MIPS3, GPR_64;
[all …]

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