Lines Matching refs:imm
56 def t2_so_reg : Operand<i32>, // reg imm
73 def t2_so_imm_not_XFORM : SDNodeXForm<imm, [{
79 def t2_so_imm_neg_XFORM : SDNodeXForm<imm, [{
87 def t2_so_imm_notSext16_XFORM : SDNodeXForm<imm, [{
115 def t2_so_imm_not : Operand<i32>, PatLeaf<(imm), [{
123 def t2_so_imm_notSext : Operand<i32>, PatLeaf<(imm), [{
149 def imm0_4095_neg : Operand<i32>, PatLeaf<(i32 imm), [{
155 def imm1_255_neg : PatLeaf<(i32 imm), [{
160 def imm0_255_not : PatLeaf<(i32 imm), [{
164 def lo5AllOne : PatLeaf<(i32 imm), [{
446 bits<12> imm;
449 let Inst{26} = imm{11};
450 let Inst{14-12} = imm{10-8};
451 let Inst{7-0} = imm{7-0};
460 bits<12> imm;
463 let Inst{26} = imm{11};
464 let Inst{14-12} = imm{10-8};
465 let Inst{7-0} = imm{7-0};
472 bits<12> imm;
475 let Inst{26} = imm{11};
476 let Inst{14-12} = imm{10-8};
477 let Inst{7-0} = imm{7-0};
556 bits<12> imm;
560 let Inst{26} = imm{11};
561 let Inst{14-12} = imm{10-8};
562 let Inst{7-0} = imm{7-0};
570 bits<12> imm;
574 let Inst{26} = imm{11};
575 let Inst{14-12} = imm{10-8};
576 let Inst{7-0} = imm{7-0};
584 bits<5> imm;
588 let Inst{14-12} = imm{4-2};
589 let Inst{7-6} = imm{1-0};
597 bits<5> imm;
601 let Inst{14-12} = imm{4-2};
602 let Inst{7-6} = imm{1-0};
731 // shifted imm
733 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), iii,
734 opc, "\t$Rd, $Rn, $imm",
735 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_imm:$imm))]>,
780 def : t2InstAlias<!strconcat(opc, "${s}${p} $Rdn, $imm"),
782 t2_so_imm:$imm, pred:$p,
801 def : t2InstAlias<!strconcat(opc, "${s}${p}.w", " $Rd, $Rn, $imm"),
802 (!cast<Instruction>(NAME#"ri") rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p,
813 def : t2InstAlias<!strconcat(opc, "${s}${p}.w", " $Rdn, $imm"),
814 (!cast<Instruction>(NAME#"ri") rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm,
828 // shifted imm
830 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi,
831 opc, ".w\t$Rd, $Rn, $imm",
832 [(set rGPR:$Rd, (opnode t2_so_imm:$imm, rGPR:$Rn))]>,
873 // shifted imm
875 (ins GPRnopc:$Rn, t2_so_imm:$imm, pred:$p),
878 t2_so_imm:$imm))]>,
902 // shifted imm
904 (ins rGPR:$Rn, t2_so_imm:$imm, pred:$p),
906 [(set rGPR:$Rd, CPSR, (opnode t2_so_imm:$imm,
923 // shifted imm
928 (outs GPRsp:$Rd), (ins GPRsp:$Rn, t2_so_imm:$imm), IIC_iALUi,
929 opc, ".w\t$Rd, $Rn, $imm",
944 (outs rGPR:$Rd), (ins GPRnopc:$Rn, t2_so_imm:$imm), IIC_iALUi,
945 opc, ".w\t$Rd, $Rn, $imm",
946 [(set rGPR:$Rd, (opnode GPRnopc:$Rn, t2_so_imm:$imm))]>,
955 // 12-bit imm
957 (outs rGPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm), IIC_iALUi,
958 !strconcat(opc, "w"), "\t$Rd, $Rn, $imm",
959 [(set rGPR:$Rd, (opnode GPR:$Rn, imm0_4095:$imm))]>,
963 bits<12> imm;
965 let Inst{26} = imm{11};
971 let Inst{14-12} = imm{10-8};
973 let Inst{7-0} = imm{7-0};
976 (outs GPRsp:$Rd), (ins GPRsp:$Rn, imm0_4095:$imm), IIC_iALUi,
977 !strconcat(opc, "w"), "\t$Rd, $Rn, $imm",
982 bits<12> imm;
984 let Inst{26} = imm{11};
990 let Inst{14-12} = imm{10-8};
992 let Inst{7-0} = imm{7-0};
1028 // shifted imm
1029 def ri : T2sTwoRegImm<(outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm),
1030 IIC_iALUi, opc, "\t$Rd, $Rn, $imm",
1031 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, t2_so_imm:$imm, CPSR))]>,
1063 def : t2InstAlias<!strconcat(opc, "${s}${p}", ".w $Rdn, $imm"),
1064 (!cast<Instruction>(NAME#"ri") rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p,
1072 def : t2InstAlias<!strconcat(opc, "${s}${p}", "$Rdn, $imm"),
1073 (!cast<Instruction>(NAME#"ri") rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p,
1086 // 5-bit imm
1088 (outs rGPR:$Rd), (ins rGPR:$Rm, ty:$imm), IIC_iMOVsi,
1089 opc, ".w\t$Rd, $Rm, $imm",
1090 [(set rGPR:$Rd, (opnode rGPR:$Rm, (i32 ty:$imm)))]>,
1112 def : t2InstAlias<!strconcat(opc, "${s}${p}", ".w $Rdn, $imm"),
1113 (!cast<Instruction>(NAME#"ri") rGPR:$Rdn, rGPR:$Rdn, ty:$imm, pred:$p,
1120 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $imm"),
1121 (!cast<Instruction>(NAME#"ri") rGPR:$Rd, rGPR:$Rn, ty:$imm, pred:$p,
1128 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rdn, $imm"),
1129 (!cast<Instruction>(NAME#"ri") rGPR:$Rdn, rGPR:$Rdn, ty:$imm, pred:$p,
1143 // shifted imm
1145 (outs), (ins LHSGPR:$Rn, t2_so_imm:$imm), iii,
1146 opc, ".w\t$Rn, $imm",
1147 [(opnode LHSGPR:$Rn, t2_so_imm:$imm)]>, Sched<[WriteCMP]> {
1186 def : t2InstAlias<!strconcat(opc, "${p}", " $Rn, $imm"),
1187 (!cast<Instruction>(NAME#"ri") LHSGPR:$Rn, t2_so_imm:$imm, pred:$p)>;
1209 let Inst{11-0} = addr{11-0}; // imm
1232 let Inst{7-0} = addr{7-0}; // imm
1254 let Inst{5-4} = addr{1-0}; // imm
1304 let Inst{11-0} = addr{11-0}; // imm
1325 let Inst{7-0} = addr{7-0}; // imm
1343 let Inst{5-4} = addr{1-0}; // imm
1596 def t2LDR_POST_imm : t2AsmPseudo<"ldr${p}.w $Rt, $Rn, $imm",
1597 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1606 def t2LDRB_POST_imm : t2AsmPseudo<"ldrb${p}.w $Rt, $Rn, $imm",
1607 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1616 def t2LDRH_POST_imm : t2AsmPseudo<"ldrh${p}.w $Rt, $Rn, $imm",
1617 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1626 def t2LDRSB_POST_imm : t2AsmPseudo<"ldrsb${p}.w $Rt, $Rn, $imm",
1627 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1636 def t2LDRSH_POST_imm : t2AsmPseudo<"ldrsh${p}.w $Rt, $Rn, $imm",
1637 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1802 def t2STR_POST_imm : t2AsmPseudo<"str${p}.w $Rt, $Rn, $imm",
1803 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1812 def t2STRB_POST_imm : t2AsmPseudo<"strb${p}.w $Rt, $Rn, $imm",
1813 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1822 def t2STRH_POST_imm : t2AsmPseudo<"strh${p}.w $Rt, $Rn, $imm",
1823 (ins GPR:$Rt, addr_offset_none:$Rn, t2am_imm8_offset:$imm, pred:$p)>;
1863 (ins addr_offset_none:$addr, t2am_imm8s4_offset:$imm),
1864 IIC_iLoad_d_ru, "ldrd", "\t$Rt, $Rt2, $addr$imm",
1878 t2am_imm8s4_offset:$imm),
1879 IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, $addr$imm",
2228 def t2MOVi : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), IIC_iMOVi,
2229 "mov", ".w\t$Rd, $imm",
2230 [(set rGPR:$Rd, t2_so_imm:$imm)]>, Sched<[WriteALU]> {
2240 def : t2InstAlias<"movs${p}.w $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
2242 def : t2InstAlias<"movs${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
2245 def : t2InstAlias<"mov${p}.w $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
2247 def : t2InstAlias<"mov${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
2251 def t2MOVi16 : T2I<(outs rGPR:$Rd), (ins imm0_65535_expr:$imm), IIC_iMOVi,
2252 "movw", "\t$Rd, $imm",
2253 [(set rGPR:$Rd, imm0_65535:$imm)]>, Sched<[WriteALU]>,
2262 bits<16> imm;
2265 let Inst{19-16} = imm{15-12};
2266 let Inst{26} = imm{11};
2267 let Inst{14-12} = imm{10-8};
2268 let Inst{7-0} = imm{7-0};
2272 def : InstAlias<"mov${p} $Rd, $imm",
2273 (t2MOVi16 rGPR:$Rd, imm256_65535_expr:$imm, pred:$p), 0>,
2284 (ins rGPR:$src, imm0_65535_expr:$imm), IIC_iMOVi,
2285 "movt", "\t$Rd, $imm",
2287 (or (and rGPR:$src, 0xffff), lo16AllZero:$imm))]>,
2297 bits<16> imm;
2300 let Inst{19-16} = imm{15-12};
2301 let Inst{26} = imm{11};
2302 let Inst{14-12} = imm{10-8};
2303 let Inst{7-0} = imm{7-0};
2444 def : t2InstSubst<"adc${s}${p} $rd, $rn, $imm",
2445 (t2SBCri rGPR:$rd, rGPR:$rn, t2_so_imm_not:$imm, pred:$p, s_cc_out:$s)>;
2446 def : t2InstSubst<"adc${s}${p} $rdn, $imm",
2447 (t2SBCri rGPR:$rdn, rGPR:$rdn, t2_so_imm_not:$imm, pred:$p, s_cc_out:$s)>;
2448 def : t2InstSubst<"sbc${s}${p} $rd, $rn, $imm",
2449 (t2ADCri rGPR:$rd, rGPR:$rn, t2_so_imm_not:$imm, pred:$p, s_cc_out:$s)>;
2450 def : t2InstSubst<"sbc${s}${p} $rdn, $imm",
2451 (t2ADCri rGPR:$rdn, rGPR:$rdn, t2_so_imm_not:$imm, pred:$p, s_cc_out:$s)>;
2453 def : t2InstSubst<"add${s}${p}.w $rd, $rn, $imm",
2454 (t2SUBri rGPR:$rd, GPRnopc:$rn, t2_so_imm_neg:$imm, pred:$p, s_cc_out:$s)>;
2455 def : t2InstSubst<"sub${s}${p}.w $rd, $rn, $imm",
2456 (t2ADDri rGPR:$rd, GPRnopc:$rn, t2_so_imm_neg:$imm, pred:$p, s_cc_out:$s)>;
2457 def : t2InstSubst<"subw${p} $Rd, $Rn, $imm",
2458 (t2ADDri12 rGPR:$Rd, GPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
2459 def : t2InstSubst<"sub${s}${p} $rd, $rn, $imm",
2460 (t2ADDri rGPR:$rd, GPRnopc:$rn, t2_so_imm_neg:$imm, pred:$p, s_cc_out:$s)>;
2461 def : t2InstSubst<"sub${p} $rd, $rn, $imm",
2462 (t2ADDri12 rGPR:$rd, GPR:$rn, imm0_4095_neg:$imm, pred:$p)>;
2465 def : t2InstSubst<"add${s}${p}.w $rd, $rn, $imm",
2466 (t2SUBspImm GPRsp:$rd, GPRsp:$rn, t2_so_imm_neg:$imm, pred:$p, s_cc_out:$s)>;
2467 def : t2InstSubst<"sub${s}${p}.w $rd, $rn, $imm",
2468 (t2ADDspImm GPRsp:$rd, GPRsp:$rn, t2_so_imm_neg:$imm, pred:$p, s_cc_out:$s)>;
2469 def : t2InstSubst<"subw${p} $Rd, $Rn, $imm",
2470 (t2ADDspImm12 GPRsp:$Rd, GPRsp:$Rn, imm0_4095_neg:$imm, pred:$p)>;
2471 def : t2InstSubst<"sub${s}${p} $rd, $rn, $imm",
2472 (t2ADDspImm GPRsp:$rd, GPRsp:$rn, t2_so_imm_neg:$imm, pred:$p, s_cc_out:$s)>;
2473 def : t2InstSubst<"sub${p} $rd, $rn, $imm",
2474 (t2ADDspImm12 GPRsp:$rd, GPRsp:$rn, imm0_4095_neg:$imm, pred:$p)>;
2484 // (sub X, imm) gets canonicalized to (add X, -imm). Match this form.
2492 def : T2Pat<(add rGPR:$src, imm1_255_neg:$imm),
2493 (t2SUBri rGPR:$src, imm1_255_neg:$imm)>;
2494 def : T2Pat<(add rGPR:$src, t2_so_imm_neg:$imm),
2495 (t2SUBri rGPR:$src, t2_so_imm_neg:$imm)>;
2496 def : T2Pat<(add rGPR:$src, imm0_4095_neg:$imm),
2497 (t2SUBri12 rGPR:$src, imm0_4095_neg:$imm)>;
2498 def : T2Pat<(add GPR:$src, imm0_65535_neg:$imm),
2499 (t2SUBrr GPR:$src, (t2MOVi16 (imm_neg_XFORM imm:$imm)))>;
2502 def : T1Pat<(add tGPR:$src, imm0_65535_neg:$imm),
2503 (tSUBrr tGPR:$src, (t2MOVi16 (imm_neg_XFORM imm:$imm)))>,
2507 def : T2Pat<(ARMaddc rGPR:$src, imm1_255_neg:$imm),
2508 (t2SUBSri rGPR:$src, imm1_255_neg:$imm)>;
2509 def : T2Pat<(ARMaddc rGPR:$src, t2_so_imm_neg:$imm),
2510 (t2SUBSri rGPR:$src, t2_so_imm_neg:$imm)>;
2511 def : T2Pat<(ARMaddc rGPR:$src, imm0_65535_neg:$imm),
2512 (t2SUBSrr rGPR:$src, (t2MOVi16 (imm_neg_XFORM imm:$imm)))>;
2517 def : T2Pat<(ARMadde rGPR:$src, imm0_255_not:$imm, CPSR),
2518 (t2SBCri rGPR:$src, imm0_255_not:$imm)>;
2519 def : T2Pat<(ARMadde rGPR:$src, t2_so_imm_not:$imm, CPSR),
2520 (t2SBCri rGPR:$src, t2_so_imm_not:$imm)>;
2521 def : T2Pat<(ARMadde rGPR:$src, imm0_65535_neg:$imm, CPSR),
2522 (t2SBCrr rGPR:$src, (t2MOVi16 (imm_not_XFORM imm:$imm)))>;
2738 def : T2Pat<(ARMssat GPRnopc:$Rn, imm0_31:$imm),
2739 (t2SSAT imm0_31:$imm, GPRnopc:$Rn, 0)>;
2740 def : T2Pat<(ARMusat GPRnopc:$Rn, imm0_31:$imm),
2741 (t2USAT imm0_31:$imm, GPRnopc:$Rn, 0)>;
2873 def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm),
2874 IIC_iUNAsi, "bfc", "\t$Rd, $imm",
2875 [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]>, Sched<[WriteALU]> {
2884 bits<10> imm;
2885 let msb{4-0} = imm{9-5};
2886 let lsb{4-0} = imm{4-0};
2927 (ins rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm),
2928 IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm",
2930 bf_inv_mask_imm:$imm))]>, Sched<[WriteALU]> {
2938 bits<10> imm;
2939 let msb{4-0} = imm{9-5};
2940 let lsb{4-0} = imm{4-0};
2947 def : t2InstAlias<"orn${s}${p}.w $Rd, $Rn, $imm",
2948 (t2ORNri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
2961 // shifted imm
2962 def i : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), iii,
2963 opc, "\t$Rd, $imm",
2964 [(set rGPR:$Rd, (opnode t2_so_imm:$imm))]>, Sched<[WriteALU]> {
3005 def : T2Pat<(and rGPR:$src, t2_so_imm_not:$imm),
3006 (t2BICri rGPR:$src, t2_so_imm_not:$imm)>;
3008 // so_imm_notSext is needed instead of so_imm_not, as the value of imm
3010 def : T2Pat<(and top16Zero:$src, t2_so_imm_notSext:$imm),
3011 (t2BICri rGPR:$src, t2_so_imm_notSext:$imm)>;
3014 def : T2Pat<(or rGPR:$src, t2_so_imm_not:$imm),
3015 (t2ORNri rGPR:$src, t2_so_imm_not:$imm)>,
3024 def : T2Pat<(or AddLikeOrOp:$Rn, t2_so_imm:$imm),
3025 (t2ADDri rGPR:$Rn, t2_so_imm:$imm)>;
3467 def : T2Pat<(ARMcmpZ GPRnopc:$lhs, t2_so_imm:$imm),
3468 (t2CMPri GPRnopc:$lhs, t2_so_imm:$imm)>;
3475 // shifted imm
3477 (outs), (ins GPRnopc:$Rn, t2_so_imm:$imm), IIC_iCMPi,
3478 "cmn", ".w\t$Rn, $imm",
3479 [(ARMcmn GPRnopc:$Rn, (ineg t2_so_imm:$imm))]>,
3521 def : t2InstAlias<"cmn${p} $Rn, $imm",
3522 (t2CMNri GPRnopc:$Rn, t2_so_imm:$imm, pred:$p)>;
3526 def : T2Pat<(ARMcmp GPR:$src, t2_so_imm_neg:$imm),
3527 (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>;
3529 def : T2Pat<(ARMcmpZ GPRnopc:$src, t2_so_imm_neg:$imm),
3530 (t2CMNri GPRnopc:$src, t2_so_imm_neg:$imm)>;
3553 (ins rGPR:$false, t2_so_imm:$imm, cmovpred:$p),
3555 [(set rGPR:$Rd, (ARMcmov rGPR:$false,t2_so_imm:$imm,
3563 (ins rGPR:$false, imm0_65535_expr:$imm, cmovpred:$p),
3565 [(set rGPR:$Rd, (ARMcmov rGPR:$false, imm0_65535:$imm,
3572 (ins rGPR:$false, t2_so_imm:$imm, cmovpred:$p),
3575 (ARMcmov rGPR:$false, t2_so_imm_not:$imm,
3581 (ins rGPR:$false, rGPR:$Rm, i32imm:$imm, cmovpred:$p),
3584 (opnode rGPR:$Rm, (i32 ty:$imm)),
3598 [(set rGPR:$dst, (ARMcmov rGPR:$false, imm:$src,
4008 [/*(ARMbrcond bb:$target, imm:$cc)*/]>, Sched<[WriteBr]> {
4135 def t2HINT : T2I<(outs), (ins imm0_239:$imm), NoItinerary, "hint", ".w\t$imm",
4136 [(int_arm_hint imm0_239:$imm)]> {
4137 bits<8> imm;
4139 let Inst{7-0} = imm;
4144 def : t2InstAlias<"hint$p $imm", (t2HINT imm0_239:$imm, pred:$p), 0>;
4266 // B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.
4267 // Exception return instruction is "subs pc, lr, #imm".
4269 def t2SUBS_PC_LR : T2I <(outs), (ins imm0_255:$imm), NoItinerary,
4270 "subs", "\tpc, lr, $imm",
4271 [(ARMintretglue imm0_255:$imm)]>,
4275 bits<8> imm;
4276 let Inst{7-0} = imm;
4315 [(set rGPR:$dst, (i32 imm:$src))]>,
4366 imm:$cp))]>,
4789 def t2SETPAN : T1I<(outs), (ins imm0_1:$imm), NoItinerary, "setpan\t$imm", []>,
4791 bits<1> imm;
4794 let Inst{3} = imm;
4943 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4944 (t2ADDri rGPR:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p,
4946 def : t2InstAlias<"add${p} $Rd, $Rn, $imm",
4947 (t2ADDri12 rGPR:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p)>;
4954 def : t2InstAlias<"add${s}${p} $Rdn, $imm",
4955 (t2ADDri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4956 def : t2InstAlias<"add${p} $Rdn, $imm",
4957 (t2ADDri12 rGPR:$Rdn, rGPR:$Rdn, imm0_4095:$imm, pred:$p)>;
4958 def : t2InstAlias<"addw${p} $Rdn, $imm",
4959 (t2ADDri12 rGPR:$Rdn, rGPR:$Rdn, imm0_4095:$imm, pred:$p)>;
4967 def : t2InstSubst<"add${s}${p} $Rd, $Rn, $imm",
4968 (t2SUBri rGPR:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm, pred:$p,
4970 def : t2InstSubst<"add${p} $Rd, $Rn, $imm",
4971 (t2SUBri12 rGPR:$Rd, GPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
4972 def : t2InstSubst<"add${s}${p} $Rdn, $imm",
4973 (t2SUBri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_neg:$imm, pred:$p,
4975 def : t2InstSubst<"add${p} $Rdn, $imm",
4976 (t2SUBri12 rGPR:$Rdn, rGPR:$Rdn, imm0_4095_neg:$imm, pred:$p)>;
4978 def : t2InstSubst<"add${s}${p}.w $Rd, $Rn, $imm",
4979 (t2SUBri rGPR:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm, pred:$p,
4981 def : t2InstSubst<"addw${p} $Rd, $Rn, $imm",
4982 (t2SUBri12 rGPR:$Rd, rGPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
4983 def : t2InstSubst<"add${s}${p}.w $Rdn, $imm",
4984 (t2SUBri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_neg:$imm, pred:$p,
4986 def : t2InstSubst<"addw${p} $Rdn, $imm",
4987 (t2SUBri12 rGPR:$Rdn, rGPR:$Rdn, imm0_4095_neg:$imm, pred:$p)>;
4991 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $imm",
4992 (t2SUBri rGPR:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4993 def : t2InstAlias<"sub${p} $Rd, $Rn, $imm",
4994 (t2SUBri12 rGPR:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p)>;
5001 def : t2InstAlias<"sub${s}${p} $Rdn, $imm",
5002 (t2SUBri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5003 def : t2InstAlias<"sub${p} $Rdn, $imm",
5004 (t2SUBri12 rGPR:$Rdn, rGPR:$Rdn, imm0_4095:$imm, pred:$p)>;
5005 def : t2InstAlias<"subw${p} $Rdn, $imm",
5006 (t2SUBri12 rGPR:$Rdn, rGPR:$Rdn, imm0_4095:$imm, pred:$p)>;
5017 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
5018 (t2ADDspImm GPRsp:$Rd, GPRsp:$Rn, t2_so_imm:$imm, pred:$p,
5020 def : t2InstAlias<"add${p} $Rd, $Rn, $imm",
5021 (t2ADDspImm12 GPRsp:$Rd, GPRsp:$Rn, imm0_4095:$imm, pred:$p)>;
5023 def : t2InstAlias<"add${s}${p} $Rdn, $imm",
5024 (t2ADDspImm GPRsp:$Rdn, GPRsp:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5026 def : t2InstAlias<"add${s}${p}.w $Rdn, $imm",
5027 (t2ADDspImm GPRsp:$Rdn, GPRsp:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5029 def : t2InstAlias<"add${p} $Rdn, $imm",
5030 (t2ADDspImm12 GPRsp:$Rdn, GPRsp:$Rdn, imm0_4095:$imm, pred:$p)>;
5032 def : t2InstAlias<"addw${p} $Rdn, $imm",
5033 (t2ADDspImm12 GPRsp:$Rdn, GPRsp:$Rdn, imm0_4095:$imm, pred:$p)>;
5036 def : t2InstSubst<"add${s}${p} $Rd, $Rn, $imm",
5037 (t2SUBspImm GPRsp:$Rd, GPRsp:$Rn, t2_so_imm_neg:$imm, pred:$p,
5039 def : t2InstSubst<"add${p} $Rd, $Rn, $imm",
5040 (t2SUBspImm12 GPRsp:$Rd, GPRsp:$Rn, imm0_4095_neg:$imm, pred:$p)>;
5041 def : t2InstSubst<"add${s}${p} $Rdn, $imm",
5042 (t2SUBspImm GPRsp:$Rdn, GPRsp:$Rdn, t2_so_imm_neg:$imm, pred:$p,
5044 def : t2InstSubst<"add${p} $Rdn, $imm",
5045 (t2SUBspImm12 GPRsp:$Rdn, GPRsp:$Rdn, imm0_4095_neg:$imm, pred:$p)>;
5047 def : t2InstSubst<"add${s}${p}.w $Rd, $Rn, $imm",
5048 (t2SUBspImm GPRsp:$Rd, GPRsp:$Rn, t2_so_imm_neg:$imm, pred:$p,
5050 def : t2InstSubst<"addw${p} $Rd, $Rn, $imm",
5051 (t2SUBspImm12 GPRsp:$Rd, GPRsp:$Rn, imm0_4095_neg:$imm, pred:$p)>;
5052 def : t2InstSubst<"add${s}${p}.w $Rdn, $imm",
5053 (t2SUBspImm GPRsp:$Rdn, GPRsp:$Rdn, t2_so_imm_neg:$imm, pred:$p,
5055 def : t2InstSubst<"addw${p} $Rdn, $imm",
5056 (t2SUBspImm12 GPRsp:$Rdn, GPRsp:$Rdn, imm0_4095_neg:$imm, pred:$p)>;
5060 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $imm",
5061 (t2SUBspImm GPRsp:$Rd, GPRsp:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5062 def : t2InstAlias<"sub${p} $Rd, $Rn, $imm",
5063 (t2SUBspImm12 GPRsp:$Rd, GPRsp:$Rn, imm0_4095:$imm, pred:$p)>;
5065 def : t2InstAlias<"sub${s}${p} $Rdn, $imm",
5066 (t2SUBspImm GPRsp:$Rdn, GPRsp:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5067 def : t2InstAlias<"sub${s}${p}.w $Rdn, $imm",
5068 (t2SUBspImm GPRsp:$Rdn, GPRsp:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5069 def : t2InstAlias<"sub${p} $Rdn, $imm",
5070 (t2SUBspImm12 GPRsp:$Rdn, GPRsp:$Rdn, imm0_4095:$imm, pred:$p)>;
5071 def : t2InstAlias<"subw${p} $Rdn, $imm",
5072 (t2SUBspImm12 GPRsp:$Rdn, GPRsp:$Rdn, imm0_4095:$imm, pred:$p)>;
5150 def : t2InstAlias<"mvn${s}${p}.w $Rd, $imm",
5151 (t2MVNi rGPR:$Rd, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5204 def : t2InstAlias<"rsb${s}${p} $Rd, $Rn, $imm",
5205 (t2RSBri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5206 def : t2InstAlias<"rsb${s}${p} $Rdn, $imm",
5207 (t2RSBri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
5312 def : t2InstSubst<"mov${p} $Rd, $imm",
5313 (t2MVNi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>;
5314 def : t2InstSubst<"mvn${s}${p} $Rd, $imm",
5315 (t2MOVi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, s_cc_out:$s)>;
5317 def : t2InstSubst<"bic${s}${p} $Rd, $Rn, $imm",
5318 (t2ANDri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
5320 def : t2InstSubst<"bic${s}${p} $Rdn, $imm",
5321 (t2ANDri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
5323 def : t2InstSubst<"bic${s}${p}.w $Rd, $Rn, $imm",
5324 (t2ANDri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
5326 def : t2InstSubst<"bic${s}${p}.w $Rdn, $imm",
5327 (t2ANDri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
5329 def : t2InstSubst<"and${s}${p} $Rd, $Rn, $imm",
5330 (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
5332 def : t2InstSubst<"and${s}${p} $Rdn, $imm",
5333 (t2BICri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
5335 def : t2InstSubst<"and${s}${p}.w $Rd, $Rn, $imm",
5336 (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
5338 def : t2InstSubst<"and${s}${p}.w $Rdn, $imm",
5339 (t2BICri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
5342 def : t2InstSubst<"orn${s}${p} $Rd, $Rn, $imm",
5343 (t2ORRri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
5345 def : t2InstSubst<"orn${s}${p} $Rdn, $imm",
5346 (t2ORRri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
5348 def : t2InstSubst<"orr${s}${p} $Rd, $Rn, $imm",
5349 (t2ORNri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
5351 def : t2InstSubst<"orr${s}${p} $Rdn, $imm",
5352 (t2ORNri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
5355 def : t2InstSubst<"add${s}${p} $Rd, $Rn, $imm",
5356 (t2SUBri rGPR:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm,
5358 def : t2InstSubst<"add${s}${p} $Rd, $Rn, $imm",
5359 (t2SUBspImm GPRsp:$Rd, GPRsp:$Rn, t2_so_imm_neg:$imm,
5361 def : t2InstSubst<"add${s}${p} $Rd, $imm",
5362 (t2SUBri rGPR:$Rd, rGPR:$Rd, t2_so_imm_neg:$imm,
5364 def : t2InstSubst<"add${s}${p} $Rd, $imm",
5365 (t2SUBspImm GPRsp:$Rd, GPRsp:$Rd, t2_so_imm_neg:$imm,
5368 def : t2InstSubst<"cmp${p} $Rd, $imm",
5369 (t2CMNri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
5370 def : t2InstSubst<"cmn${p} $Rd, $imm",
5371 (t2CMPri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
5410 // LDR(literal) w/ alternate [pc, #imm] syntax.
5433 def : t2InstAlias<"add${p} $Rd, pc, $imm",
5434 (t2ADR rGPR:$Rd, imm0_4095:$imm, pred:$p)>;
5715 def : T2Pat<(Node GPRwithZR:$tval, GPRwithZR:$fval, imm0_31:$imm),
5716 (Insn GPRwithZR:$tval, GPRwithZR:$fval, imm0_31:$imm)>;
5717 def : T2Pat<(Node (i32 0), GPRwithZR:$fval, imm0_31:$imm),
5718 (Insn ZR, GPRwithZR:$fval, imm0_31:$imm)>;
5719 def : T2Pat<(Node GPRwithZR:$tval, (i32 0), imm0_31:$imm),
5720 (Insn GPRwithZR:$tval, ZR, imm0_31:$imm)>;
5721 def : T2Pat<(Node (i32 0), (i32 0), imm0_31:$imm),
5722 (Insn ZR, ZR, imm0_31:$imm)>;
5729 def : T2Pat<(ARMcmov (i32 1), (i32 0), cmovpred:$imm),
5730 (t2CSINC ZR, ZR, imm0_31:$imm)>;
5731 def : T2Pat<(ARMcmov (i32 -1), (i32 0), cmovpred:$imm),
5732 (t2CSINV ZR, ZR, imm0_31:$imm)>;
5733 def : T2Pat<(ARMcmov (i32 0), (i32 1), cmovpred:$imm),
5734 (t2CSINC ZR, ZR, (inv_cond_XFORM imm:$imm))>;
5735 def : T2Pat<(ARMcmov (i32 0), (i32 -1), cmovpred:$imm),
5736 (t2CSINV ZR, ZR, (inv_cond_XFORM imm:$imm))>;
5739 def : T2Pat<(ARMcmov modvalue, GPRwithZR:$tval, cmovpred:$imm),
5740 (Insn GPRwithZR:$tval, GPRwithZR:$fval, imm0_31:$imm)>;
5741 def : T2Pat<(ARMcmov GPRwithZR:$tval, modvalue, cmovpred:$imm),
5743 (i32 (inv_cond_XFORM imm:$imm)))>;
5749 def : T2Pat<(ARMcmov (topbitsallzero32:$Rn), (i32 1), cmovpred:$imm),
5750 (t2CSINC $Rn, ZR, (inv_cond_XFORM imm:$imm))>;
5751 def : T2Pat<(and (topbitsallzero32:$Rn), (ARMcsinc_su (i32 0), (i32 0), cmovpred:$imm)),
5752 (t2CSEL ZR, $Rn, $imm)>;
5816 class PACBTIHintSpaceInst<string asm, string ops, bits<8> imm>
5820 let Inst{7-0} = imm;
5828 class PACBTIHintSpaceNoOpsInst<string asm, bits<8> imm>
5829 : PACBTIHintSpaceInst<asm, "", imm>;
5831 class PACBTIHintSpaceDefInst<string asm, bits<8> imm>
5832 : PACBTIHintSpaceInst<asm, "r12, lr, sp", imm> {
5837 class PACBTIHintSpaceUseInst<string asm, bits<8> imm>
5838 : PACBTIHintSpaceInst<asm, "r12, lr, sp", imm> {