| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 62 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
181 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
193 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
205 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
214 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
228 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
254 return getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF; in getDispRIEncoding()
267 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF); in getDispRIXEncoding()
283 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 4) & 0xFFF); in getDispRIX16Encoding()
[all …]
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| H A D | PPCMCCodeEmitter.h | 103 /// getMachineOpValue - Return binary encoding of operand. If the machine
105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 539 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
717 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
761 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
763 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
777 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
779 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
791 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
793 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
805 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
807 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
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| H A D | MipsMCCodeEmitter.h | 177 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEMCCodeEmitter.cpp | 62 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in VEMCCodeEmitter
133 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
145 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
155 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCCodeEmitter.cpp | 65 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
132 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
141 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
237 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
248 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
259 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
270 return getMachineOpValue(MI, MO, Fixups, STI); in getCompareAndBranchTargetOpValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 56 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
108 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
210 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
281 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
291 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | R600MCCodeEmitter.cpp | 46 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
151 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
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| H A D | AMDGPUMCCodeEmitter.cpp | 48 void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
419 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
483 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
585 void AMDGPUMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in AMDGPUMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 55 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
85 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 51 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
115 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
153 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 47 void getMachineOpValue(const MCInst &MI, const MCOperand &Op,
213 void M68kMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &Op, in getMachineOpValue() function in M68kMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.h | 69 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| H A D | HexagonMCCodeEmitter.cpp | 735 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 64 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
113 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in LoongArchMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRMCCodeEmitter.h | 89 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | AVRMCCodeEmitter.cpp | 257 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaMCCodeEmitter.cpp | 58 uint32_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
190 XtensaMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in XtensaMCCodeEmitter
342 uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getMemRegEncoding()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 71 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
418 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in CSKYMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 83 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
487 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 58 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
234 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 85 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
549 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/ |
| H A D | DemangleTestCases.inc | 13727 …rERKNS1_14MachineOperandE", "(anonymous namespace)::ARMCodeEmitter::getMachineOpValue(llvm::Machin…
14095 …torImplINS1_7MCFixupEEE", "(anonymous namespace)::ARMMCCodeEmitter::getMachineOpValue(llvm::MCInst…
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