10b57cec5SDimitry Andric //===-- AVRMCCodeEmitter.h - Convert AVR Code to Machine Code -------------===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file defines the AVRMCCodeEmitter class. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric // 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_AVR_CODE_EMITTER_H 150b57cec5SDimitry Andric #define LLVM_AVR_CODE_EMITTER_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "AVRFixupKinds.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric #include "llvm/MC/MCCodeEmitter.h" 200b57cec5SDimitry Andric #include "llvm/Support/DataTypes.h" 210b57cec5SDimitry Andric 220b57cec5SDimitry Andric #define GET_INSTRINFO_OPERAND_TYPES_ENUM 230b57cec5SDimitry Andric #include "AVRGenInstrInfo.inc" 240b57cec5SDimitry Andric 250b57cec5SDimitry Andric namespace llvm { 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric class MCContext; 280b57cec5SDimitry Andric class MCExpr; 290b57cec5SDimitry Andric class MCFixup; 300b57cec5SDimitry Andric class MCInst; 310b57cec5SDimitry Andric class MCInstrInfo; 320b57cec5SDimitry Andric class MCOperand; 330b57cec5SDimitry Andric class MCSubtargetInfo; 340b57cec5SDimitry Andric class raw_ostream; 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric /// Writes AVR machine code to a stream. 370b57cec5SDimitry Andric class AVRMCCodeEmitter : public MCCodeEmitter { 380b57cec5SDimitry Andric public: AVRMCCodeEmitter(const MCInstrInfo & MCII,MCContext & Ctx)390b57cec5SDimitry Andric AVRMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx) 400b57cec5SDimitry Andric : MCII(MCII), Ctx(Ctx) {} 410b57cec5SDimitry Andric 420b57cec5SDimitry Andric private: 430b57cec5SDimitry Andric /// Finishes up encoding an LD/ST instruction. 440b57cec5SDimitry Andric /// The purpose of this function is to set an bit in the instruction 450b57cec5SDimitry Andric /// which follows no logical pattern. See the implementation for details. 460b57cec5SDimitry Andric unsigned loadStorePostEncoder(const MCInst &MI, unsigned EncodedValue, 470b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 480b57cec5SDimitry Andric 490b57cec5SDimitry Andric /// Gets the encoding for a conditional branch target. 500b57cec5SDimitry Andric template <AVR::Fixups Fixup> 510b57cec5SDimitry Andric unsigned encodeRelCondBrTarget(const MCInst &MI, unsigned OpNo, 520b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 530b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 540b57cec5SDimitry Andric 550b57cec5SDimitry Andric /// Encodes the `PTRREGS` operand to a load or store instruction. 560b57cec5SDimitry Andric unsigned encodeLDSTPtrReg(const MCInst &MI, unsigned OpNo, 570b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 580b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 590b57cec5SDimitry Andric 600b57cec5SDimitry Andric /// Encodes a `register+immediate` operand for `LDD`/`STD`. 610b57cec5SDimitry Andric unsigned encodeMemri(const MCInst &MI, unsigned OpNo, 620b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 630b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 640b57cec5SDimitry Andric 650b57cec5SDimitry Andric /// Takes the complement of a number (~0 - val). 660b57cec5SDimitry Andric unsigned encodeComplement(const MCInst &MI, unsigned OpNo, 670b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 680b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 690b57cec5SDimitry Andric 700b57cec5SDimitry Andric /// Encodes an immediate value with a given fixup. 710b57cec5SDimitry Andric /// \tparam Offset The offset into the instruction for the fixup. 720b57cec5SDimitry Andric template <AVR::Fixups Fixup, unsigned Offset> 730b57cec5SDimitry Andric unsigned encodeImm(const MCInst &MI, unsigned OpNo, 740b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 750b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 760b57cec5SDimitry Andric 770b57cec5SDimitry Andric /// Gets the encoding of the target for the `CALL k` instruction. 780b57cec5SDimitry Andric unsigned encodeCallTarget(const MCInst &MI, unsigned OpNo, 790b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 800b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 810b57cec5SDimitry Andric 820b57cec5SDimitry Andric /// TableGen'ed function to get the binary encoding for an instruction. 830b57cec5SDimitry Andric uint64_t getBinaryCodeForInstr(const MCInst &MI, 840b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 850b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 860b57cec5SDimitry Andric 870b57cec5SDimitry Andric unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups, 880b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 890b57cec5SDimitry Andric 900b57cec5SDimitry Andric /// Returns the binary encoding of operand. 910b57cec5SDimitry Andric /// 920b57cec5SDimitry Andric /// If the machine operand requires relocation, the relocation is recorded 930b57cec5SDimitry Andric /// and zero is returned. 940b57cec5SDimitry Andric unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 950b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 960b57cec5SDimitry Andric const MCSubtargetInfo &STI) const; 970b57cec5SDimitry Andric 98*06c3fb27SDimitry Andric void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB, 990b57cec5SDimitry Andric SmallVectorImpl<MCFixup> &Fixups, 1000b57cec5SDimitry Andric const MCSubtargetInfo &STI) const override; 1010b57cec5SDimitry Andric 1020b57cec5SDimitry Andric AVRMCCodeEmitter(const AVRMCCodeEmitter &) = delete; 1030b57cec5SDimitry Andric void operator=(const AVRMCCodeEmitter &) = delete; 1040b57cec5SDimitry Andric 1050b57cec5SDimitry Andric const MCInstrInfo &MCII; 1060b57cec5SDimitry Andric MCContext &Ctx; 1070b57cec5SDimitry Andric }; 1080b57cec5SDimitry Andric 109349cc55cSDimitry Andric } // namespace llvm 1100b57cec5SDimitry Andric 1110b57cec5SDimitry Andric #endif // LLVM_AVR_CODE_EMITTER_H 112