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Searched refs:funct3 (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrFormatsC.td41 class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
47 let Inst{15-13} = funct3;
57 class RVInst16CSS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
64 let Inst{15-13} = funct3;
70 class RVInst16CIW<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
76 let Inst{15-13} = funct3;
84 class RVInst16CL<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
90 let Inst{15-13} = funct3;
99 class RVInst16CS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
105 let Inst{15-13} = funct3;
[all …]
H A DRISCVInstrInfoZalasr.td19 class LAQ_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
20 : RVInstRAtomic<0b00110, aq, rl, funct3, OPC_AMO,
27 class SRL_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
28 : RVInstRAtomic<0b00111, aq, rl, funct3, OPC_AMO,
33 multiclass LAQ_r_aq_rl<bits<3> funct3, string opcodestr> {
34 def _AQ : LAQ_r<1, 0, funct3, opcodestr # ".aq">;
35 def _AQ_RL : LAQ_r<1, 1, funct3, opcodestr # ".aqrl">;
38 multiclass SRL_r_aq_rl<bits<3> funct3, string opcodestr> {
39 def _RL : SRL_r<0, 1, funct3, opcodestr # ".rl">;
40 def _AQ_RL : SRL_r<1, 1, funct3, opcodestr # ".aqrl">;
H A DRISCVInstrInfoZimop.td14 class RVInstIMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3, RISCVOpcode opcode,
16 : RVInstIBase<funct3, opcode, outs, ins, opcodestr, argstr> {
25 class RVInstRMoprr<bits<4> imm4, bits<3> imm3, bits<3> funct3, RISCVOpcode opcode,
27 : RVInstRBase<funct3, opcode, outs, ins, opcodestr, argstr> {
45 class RVMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3,
47 : RVInstIMopr<imm7, imm5, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
51 class RVMoprr<bits<4> imm4, bits<3> imm3, bits<3> funct3,
53 : RVInstRMoprr<imm4, imm3, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
H A DRISCVInstrInfoXCV.td55 class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
57 : RVInstIBase<funct3, OPC_CUSTOM_2, outs, ins, opcodestr, argstr> {
65 class CVBitManipRII<bits<2> funct2, bits<3> funct3, string opcodestr,
67 : CVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
82 class CVInstMac<bits<7> funct7, bits<3> funct3, string opcodestr>
83 : RVInstR<funct7, funct3, OPC_CUSTOM_1,
92 class CVInstMacMulN<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
94 : RVInstRBase<funct3, OPC_CUSTOM_2, outs, ins, opcodestr,
106 class CVInstMacN<bits<2> funct2, bits<3> funct3, string opcodestr>
107 : CVInstMacMulN<funct2, funct3, (outs GPR:$rd_wb),
[all …]
H A DRISCVInstrFormats.td340 class RVInstRBase<bits<3> funct3, RISCVOpcode opcode, dag outs,
349 let Inst{14-12} = funct3;
354 class RVInstR<bits<7> funct7, bits<3> funct3, RISCVOpcode opcode, dag outs,
356 : RVInstRBase<funct3, opcode, outs, ins, opcodestr, argstr> {
360 class RVInstRAtomic<bits<5> funct5, bit aq, bit rl, bits<3> funct3,
363 : RVInstRBase<funct3, opcode, outs, ins, opcodestr, argstr> {
385 class RVInstR4<bits<2> funct2, bits<3> funct3, RISCVOpcode opcode, dag outs,
397 let Inst{14-12} = funct3;
422 class RVInstIBase<bits<3> funct3, RISCVOpcode opcode, dag outs, dag ins,
429 let Inst{14-12} = funct3;
[all …]
H A DRISCVInstrInfoA.td19 class LR_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
20 : RVInstRAtomic<0b00010, aq, rl, funct3, OPC_AMO,
26 multiclass LR_r_aq_rl<bits<3> funct3, string opcodestr> {
27 def "" : LR_r<0, 0, funct3, opcodestr>;
28 def _AQ : LR_r<1, 0, funct3, opcodestr # ".aq">;
29 def _RL : LR_r<0, 1, funct3, opcodestr # ".rl">;
30 def _AQ_RL : LR_r<1, 1, funct3, opcodestr # ".aqrl">;
34 class SC_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
35 : RVInstRAtomic<0b00011, aq, rl, funct3, OPC_AMO,
39 multiclass SC_r_aq_rl<bits<3> funct3, string opcodestr> {
[all …]
H A DRISCVInstrInfoC.td236 class CStackLoad<bits<3> funct3, string OpcodeStr,
238 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SPMem:$rs1, opnd:$imm),
242 class CStackStore<bits<3> funct3, string OpcodeStr,
244 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SPMem:$rs1, opnd:$imm),
248 class CLoad_ri<bits<3> funct3, string OpcodeStr,
250 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRCMem:$rs1, opnd:$imm),
254 class CStore_rri<bits<3> funct3, string OpcodeStr,
256 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2,GPRCMem:$rs1, opnd:$imm),
260 class Bcz<bits<3> funct3, string OpcodeStr>
261 : RVInst16CB<funct3, 0b01, (outs), (ins GPRC:$rs1, bare_simm9_lsb0:$imm),
[all …]
H A DRISCVInstrInfoXAndes.td116 class NDSRVInstBC<bits<3> funct3, string opcodestr>
129 let Inst{14-12} = funct3;
140 class NDSRVInstBFO<bits<3> funct3, string opcodestr>
153 let Inst{14-12} = funct3;
203 class NDSRVInstLHGP<bits<3> funct3, string opcodestr>
214 let Inst{14-12} = funct3;
223 class NDSRVInstLWGP<bits<3> funct3, string opcodestr>
235 let Inst{14-12} = funct3;
244 class NDSRVInstLDGP<bits<3> funct3, string opcodestr>
256 let Inst{14-12} = funct3;
[all …]
H A DRISCVInstrInfoZa.td44 class AMO_cas<bits<5> funct5, bit aq, bit rl, bits<3> funct3, string opcodestr,
46 : RVInstRAtomic<funct5, aq, rl, funct3, OPC_AMO,
50 multiclass AMO_cas_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr,
52 def "" : AMO_cas<funct5, 0, 0, funct3, opcodestr, RC>;
53 def _AQ : AMO_cas<funct5, 1, 0, funct3, opcodestr # ".aq", RC>;
54 def _RL : AMO_cas<funct5, 0, 1, funct3, opcodestr # ".rl", RC>;
55 def _AQ_RL : AMO_cas<funct5, 1, 1, funct3, opcodestr # ".aqrl", RC>;
H A DRISCVInstrInfo.td618 class BranchCC_rri<bits<3> funct3, string opcodestr>
619 : RVInstB<funct3, OPC_BRANCH, (outs),
631 class Load_ri<bits<3> funct3, string opcodestr, DAGOperand rty = GPR>
632 : RVInstI<funct3, OPC_LOAD, (outs rty:$rd), (ins GPRMem:$rs1, simm12:$imm12),
646 class Store_rri<bits<3> funct3, string opcodestr, DAGOperand rty = GPR>
647 : RVInstS<funct3, OPC_STORE, (outs),
660 class ALU_ri<bits<3> funct3, string opcodestr>
661 : RVInstI<funct3, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1, simm12:$imm12),
666 class Shift_ri<bits<5> imm11_7, bits<3> funct3, string opcodestr>
667 : RVInstIShift<imm11_7, funct3, OPC_OP_IMM, (outs GPR:$rd),
[all …]
H A DRISCVInstrInfoXVentana.td19 class VTMaskedMove<bits<3> funct3, string opcodestr>
20 : RVInstR<0b0000000, funct3, OPC_CUSTOM_3, (outs GPR:$rd),
H A DRISCVInstrInfoXqci.td460 class QCIBitManipRII<bits<3> funct3, bits<2> funct2,
462 : RVInstIBase<funct3, OPC_CUSTOM_0, (outs GPRNoX0:$rd),
485 class QCISELECTIICC<bits<3> funct3, string opcodestr>
486 : RVInstR4<0b00, funct3, OPC_CUSTOM_2, (outs GPRNoX0:$rd_wb),
498 class QCISELECTICC<bits<3> funct3, string opcodestr>
499 : RVInstR4<0b01, funct3, OPC_CUSTOM_2, (outs GPRNoX0:$rd_wb),
509 class QCISELECTCCI<bits<3> funct3, string opcodestr>
510 : RVInstR4<0b10, funct3, OPC_CUSTOM_2, (outs GPRNoX0:$rd_wb),
520 class QCISELECTICCI<bits<3> funct3, string opcodestr>
521 : RVInstR4<0b11, funct3, OPC_CUSTOM_2, (outs GPRNoX0:$rd_wb),
[all …]
H A DRISCVInstrInfoF.td196 class FPLoad_r<bits<3> funct3, string opcodestr, DAGOperand rty,
198 : RVInstI<funct3, OPC_LOAD_FP, (outs rty:$rd),
204 class FPStore_r<bits<3> funct3, string opcodestr, DAGOperand rty,
206 : RVInstS<funct3, OPC_STORE_FP, (outs),
226 class FPALU_rr<bits<7> funct7, bits<3> funct3, string opcodestr,
228 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rty:$rd),
232 multiclass FPALU_rr_m<bits<7> funct7, bits<3> funct3, string opcodestr,
235 def Ext.Suffix : FPALU_rr<funct7, funct3, opcodestr, Ext.PrimaryTy, Commutable>;
254 class FPUnaryOp_r<bits<7> funct7, bits<5> rs2val, bits<3> funct3,
256 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd), (ins rs1ty:$rs1),
[all …]
H A DRISCVInstrInfoZfa.td65 class FPBinaryOp_rr<bits<7> funct7, bits<3> funct3, DAGOperand rdty,
67 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd),
71 class FPFLI_r<bits<7> funct7, bits<5> rs2val, bits<3> funct3,
73 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd),
H A DRISCVInstrInfoXTHead.td104 class THShiftALU_rri<bits<3> funct3, string opcodestr>
105 : RVInstRBase<funct3, OPC_CUSTOM_0, (outs GPR:$rd),
114 class THShift_ri<bits<5> funct5, bits<3> funct3, string opcodestr>
115 : RVInstIShift<funct5, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
120 class THBitfieldExtract_rii<bits<3> funct3, string opcodestr>
121 : RVInstIBase<funct3, OPC_CUSTOM_0, (outs GPR:$rd),
136 class THShiftW_ri<bits<7> funct7, bits<3> funct3, string opcodestr>
137 : RVInstIShiftW<funct7, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
H A DRISCVInstrInfoZk.td69 class RVKUnary_rnum<bits<7> funct7, bits<3> funct3, string opcodestr>
70 : RVInstIBase<funct3, OPC_OP_IMM, (outs GPR:$rd),
H A DRISCVInstrInfoXSf.td56 class RVInstVCCustom2<bits<4> funct6_hi4, bits<3> funct3, dag outs, dag ins,
70 let Inst{14-12} = funct3;
79 class RVInstVCFCustom2<bits<4> funct6_hi4, bits<3> funct3, dag outs, dag ins,
94 let Inst{14-12} = funct3;
H A DRISCVInstrInfoZb.td252 class RVBUnaryR<bits<7> funct7, bits<3> funct3,
254 : RVInstR<funct7, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
260 class RVBShift_ri<bits<5> imm11_7, bits<3> funct3, RISCVOpcode opcode,
262 : RVInstIShift<imm11_7, funct3, opcode, (outs GPR:$rd),
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DEmulateInstructionRISCV.cpp168 static bool CompareB(uint64_t rs1, uint64_t rs2, uint32_t funct3) { in CompareB() argument
169 switch (funct3) { in CompareB()
358 if (bne_exit.funct3 != BNE) in AtomicSequence()
374 if (bne_start.funct3 != BNE) in AtomicSequence()
715 CompareB(rs1, rs2, inst.funct3)) in operator ()()
H A DRISCVInstructions.h106 uint32_t funct3; member
/freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_linux.cpp2145 unsigned funct3 = (faulty_instruction >> 12) & 0x7; // bits 12-14, inclusive in GetWriteFlag() local
2148 switch (funct3) { in GetWriteFlag()
2162 switch (funct3) { in GetWriteFlag()
2175 switch (funct3) { in GetWriteFlag()
2185 switch (funct3) { in GetWriteFlag()