| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBank.cpp | 28 if (!covers(RC)) in RegisterBank()
30 // Verify that the register bank covers all the sub classes of the in RegisterBank()
31 // classes it covers. in RegisterBank()
35 // both agree on the covers. in verify()
43 // all the register classes it covers. in verify()
46 assert(covers(SubRC) && "Not all subclasses are covered"); in verify()
52 bool RegisterBank::covers(const TargetRegisterClass &RC) const { in verify()
94 if (covers(RC)) in print()
63 bool RegisterBank::covers(const TargetRegisterClass &RC) const { covers() function in RegisterBank
|
| H A D | RegisterBankInfo.cpp | 126 assert(RegBank.covers(*RC) && in getRegBankFromConstraints()
141 if (RB && !RB->covers(RC)) in constrainGenericRegister()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MSA.txt | 18 It is not possible to emit bclri.b since andi.b covers exactly the
24 constant since shf.w covers exactly the same cases. shf.w is used
36 It is not possible to emit ilvl.d, or pckev.d since ilvev.d covers the
40 It is not possible to emit ilvr.d, or pckod.d since ilvod.d covers the
48 It is not possible to emit splati.w since shf.w covers the same cases.
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterBankInfo.cpp | 147 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRRegClassID)) && in ARMRegisterBankInfo()
149 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRwithAPSRRegClassID)) && in ARMRegisterBankInfo()
151 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnopcRegClassID)) && in ARMRegisterBankInfo()
153 assert(RBGPR.covers(*TRI.getRegClass(ARM::rGPRRegClassID)) && in ARMRegisterBankInfo()
155 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPRRegClassID)) && in ARMRegisterBankInfo()
157 assert(RBGPR.covers(*TRI.getRegClass(ARM::tcGPRRegClassID)) && in ARMRegisterBankInfo()
159 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPROdd_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
|
| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | AArch64ACLETypes.def | 20 // this macro covers all the builtin types.
25 // this macro covers the named subset of builtin types.
29 // Defining the macro covers the integer vector types.
33 // Defining the macro covers the floating point vector types.
37 // Defining the macro covers the boolean vector types.
|
| /freebsd/tools/regression/doat/ |
| H A D | README | 5 It prints OK for every successful test. This testing program only covers
|
| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm2835-rpi-common.dtsi | 3 * This include file covers the common peripherals and configuration between
|
| H A D | bcm2835-common.dtsi | 3 /* This include file covers the common peripherals and configuration between
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBank.h | 64 LLVM_ABI bool covers(const TargetRegisterClass &RC) const;
|
| /freebsd/sys/contrib/device-tree/Bindings/pwm/ |
| H A D | pxa-pwm.txt | 11 length covers only the register window for one PWM output, not that of the
|
| /freebsd/sys/dev/pms/freebsd/driver/ini/src/ |
| H A D | Readme.freebsd.txt | 57 1. This section covers how phy ID in PhyParms should be used in the
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | Sparc.td | 205 // - covers all the erratum fixes for LEON3, but does not support the CASA instruction.
210 // - covers all the erratum fixed for LEON3 and support for the CASA instruction.
|
| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/fsl/ |
| H A D | ifc.txt | 24 - ranges : Each range corresponds to a single chipselect, and covers
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 74 assert(RBGPR.covers(*TRI.getRegClass(AArch64::GPR32RegClassID)) && in AArch64RegisterBankInfo()
81 assert(RBFPR.covers(*TRI.getRegClass(AArch64::QQRegClassID)) && in AArch64RegisterBankInfo()
83 assert(RBFPR.covers(*TRI.getRegClass(AArch64::FPR64RegClassID)) && in AArch64RegisterBankInfo()
88 assert(RBCCR.covers(*TRI.getRegClass(AArch64::CCRRegClassID)) && in AArch64RegisterBankInfo()
|
| /freebsd/contrib/file/magic/Magdir/ |
| H A D | ber | 13 # The magic file covers:
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSchedSyntacoreSCR1.td | 13 // This model covers SYNTACORE_SCR1_CFG_RV32IMC_MAX configuration (syntacore-scr1-max).
|
| /freebsd/tools/pkgbase/ |
| H A D | README.md | 61 as the second line sufficiently covers the first line.
|
| /freebsd/sys/contrib/device-tree/src/mips/ralink/ |
| H A D | gardena_smart_gateway_mt7688.dts | 45 * <&pinmux_i2s_gpio> (covers GPIO0..3) is needed here as
|
| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | xlnx,sd-fec.txt | 7 principally covers codes used by LTE. The FEC Engine offers significant
|
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | nvidia,tegra124-car.txt | 17 <dt-bindings/clock/tegra124-car-common.h> (which covers IDs common
|
| /freebsd/crypto/openssl/doc/man3/ |
| H A D | OCSP_request_add1_nonce.pod | 61 additionally covers the case where the nonce is present in the request only:
|
| /freebsd/sys/contrib/device-tree/Bindings/soc/fsl/ |
| H A D | bman.txt | 16 binding covers the CCSR space programming model
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterBankInfo.cpp | |
| /freebsd/contrib/pam-krb5/ |
| H A D | TODO | 95 * Ensure that the test suite covers all possible PAM options.
|
| /freebsd/contrib/tzdata/ |
| H A D | europe | 570 # The most recent directive covers the years starting in 2002. See:
2652 # Europe/Kaliningrad covers...
2687 # Europe/Moscow covers...
2875 # Europe/Simferopol covers Crimea.
2918 # Europe/Astrakhan covers:
2941 # Europe/Volgograd covers:
2980 # Europe/Saratov covers:
3001 # Europe/Kirov covers:
3015 # Europe/Samara covers...
3035 # Europe/Ulyanovsk covers:
[all …]
|