| /freebsd/contrib/sendmail/libsm/ |
| H A D | clock.c | 202 struct itimerval clr; local
237 clr.it_interval.tv_sec = 0;
238 clr.it_interval.tv_usec = 0;
239 clr.it_value.tv_sec = 0;
240 clr.it_value.tv_usec = 0;
241 (void) setitimer(ITIMER_REAL, &clr, NULL);
262 struct itimerval clr; in sm_clear_events() local
268 clr.it_interval.tv_sec = 0; in sm_clear_events()
269 clr.it_interval.tv_usec = 0; in sm_clear_events()
270 clr.it_value.tv_sec = 0; in sm_clear_events()
[all …]
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| H A D | signal.c | 194 struct itimerval clr; local
242 clr.it_interval.tv_sec = 0;
243 clr.it_interval.tv_usec = 0;
244 clr.it_value.tv_sec = 1;
245 clr.it_value.tv_usec = 0;
246 (void) setitimer(ITIMER_REAL, &clr, NULL);
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| /freebsd/crypto/openssl/crypto/ |
| H A D | sparccpuid.S | 77 clr %o0
79 clr %o1
81 clr %o2
83 clr %o3
85 clr %o4
87 clr %o5
89 clr %o7
91 clr %l0
93 clr %l1
95 clr %l2
[all …]
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/avr/ |
| H A D | mulhi3.S | 43 clr __tmp_reg__
44 clr __zero_reg__ ; S = 0;
47 clr r21
70 clr __zero_reg__
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| /freebsd/crypto/openssl/crypto/bn/asm/ |
| H A D | sparcv8plus.S | 182 clr %o0
191 clr %o5
284 clr %o0
293 clr %o5
372 clr %o0
419 clr %o0
443 clr %o0
477 clr %o0
514 clr %o0
537 clr %o0
[all …]
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| /freebsd/sys/arm/ti/ |
| H A D | ti_scm_syscon.c | 112 ti_scm_syscon_modify_4(struct syscon *syscon, bus_size_t offset, uint32_t clr, uint32_t set) in ti_scm_syscon_modify_4() argument
121 reg &= ~clr; in ti_scm_syscon_modify_4()
125 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", offset, reg, clr, set); in ti_scm_syscon_modify_4()
234 ti_scm_syscon_clk_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in ti_scm_syscon_clk_modify_4() argument
242 reg &= ~clr; in ti_scm_syscon_clk_modify_4()
245 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); in ti_scm_syscon_clk_modify_4()
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| H A D | ti_prm.c | 169 ti_prm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in ti_prm_modify_4() argument
176 ti_prcm_modify_4(parent, addr, clr, set); in ti_prm_modify_4()
178 DPRINTF(dev, "offset=%lx (clr %x set %x)\n", addr, clr, set); in ti_prm_modify_4()
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| H A D | ti_prcm.c | 222 ti_prcm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in ti_prcm_modify_4() argument
230 reg &= ~clr; in ti_prcm_modify_4()
233 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); in ti_prcm_modify_4()
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| H A D | ti_prm.h | 34 int ti_prm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set);
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| H A D | ti_prcm.h | 33 int ti_prcm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set);
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| /freebsd/sys/dev/rtwn/ |
| H A D | if_rtwnvar.h | 594 rtwn_setbits_1(struct rtwn_softc *sc, uint16_t addr, uint8_t clr, in rtwn_setbits_1() argument
598 (rtwn_read_1(sc, addr) & ~clr) | set)); in rtwn_setbits_1()
602 rtwn_setbits_1_shift(struct rtwn_softc *sc, uint16_t addr, uint32_t clr, in rtwn_setbits_1_shift() argument
605 return (rtwn_setbits_1(sc, addr + shift, clr >> shift * NBBY, in rtwn_setbits_1_shift()
610 rtwn_setbits_2(struct rtwn_softc *sc, uint16_t addr, uint16_t clr, in rtwn_setbits_2() argument
614 (rtwn_read_2(sc, addr) & ~clr) | set)); in rtwn_setbits_2()
618 rtwn_setbits_4(struct rtwn_softc *sc, uint16_t addr, uint32_t clr, in rtwn_setbits_4() argument
622 (rtwn_read_4(sc, addr) & ~clr) | set)); in rtwn_setbits_4()
627 uint32_t clr, uint32_t set) in rtwn_rf_setbits() argument
630 (rtwn_rf_read(sc, chain, addr) & ~clr) | set); in rtwn_rf_setbits()
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| /freebsd/sys/dev/iicbus/pmic/ |
| H A D | act8846.h | 49 #define RM1(sc, reg, clr, set) act8846_modify(sc, reg, clr, set) argument
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| /freebsd/sys/dev/ath/ath_hal/ar9002/ |
| H A D | ar9285_reset.c | 366 uint32_t pwrctrl, mask, clr; in ar9285SetBoardValues() local
370 clr = mask * 0x1f; in ar9285SetBoardValues()
371 OS_REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); in ar9285SetBoardValues()
372 OS_REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); in ar9285SetBoardValues()
373 OS_REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); in ar9285SetBoardValues()
377 clr = mask * 0x1f; in ar9285SetBoardValues()
378 OS_REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); in ar9285SetBoardValues()
382 clr = mask * 0x1f; in ar9285SetBoardValues()
383 OS_REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); in ar9285SetBoardValues()
384 OS_REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); in ar9285SetBoardValues()
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| /freebsd/sys/arm64/freescale/imx/clk/ |
| H A D | imx_clk_gate.c | 43 #define MD4(_clk, off, clr, set ) \ argument
44 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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| H A D | imx_clk_mux.c | 47 #define MD4(_clk, off, clr, set ) \ argument
48 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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| /freebsd/sys/dev/clk/ |
| H A D | clk_mux.c | 43 #define MD4(_clk, off, clr, set ) \ argument
44 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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| H A D | clk_gate.c | 43 #define MD4(_clk, off, clr, set ) \ argument
44 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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| /freebsd/sys/dev/clk/rockchip/ |
| H A D | rk_clk_gate.c | 43 #define MD4(_clk, off, clr, set ) \ argument
44 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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| /freebsd/usr.bin/tip/tip/ |
| H A D | tip.c | 597 int i, flip, clr, set; in setparity() local
610 clr = 0377; in setparity()
615 clr = 0177; /* turn off bit 7 */ in setparity()
623 partab[i] = ((evenpartab[i] ^ flip) | set) & clr; in setparity()
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | 88pm860x.txt | 12 - marvell,88pm860x-irq-read-clr: inicates whether interrupt status is cleared by read
38 marvell,88pm860x-irq-read-clr;
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| /freebsd/contrib/tcpdump/ |
| H A D | print-pfsync.c | 212 const struct pfsync_clr *clr = bp; in pfsync_print_clr() local
214 ND_PRINT("\n\tcreatorid: %08x", htonl(clr->creatorid)); in pfsync_print_clr()
215 if (clr->ifname[0] != '\0') in pfsync_print_clr()
216 ND_PRINT(" interface: %s", clr->ifname); in pfsync_print_clr()
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| /freebsd/sys/dev/clk/allwinner/ |
| H A D | aw_ccu.c | 116 aw_ccu_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in aw_ccu_modify_4() argument
130 val &= ~clr; in aw_ccu_modify_4()
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| H A D | aw_clk_prediv_mux.c | 62 #define MODIFY4(_clk, off, clr, set ) \ argument
63 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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| H A D | aw_ccung.c | 100 aw_ccung_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in aw_ccung_modify_4() argument
107 dprintf("offset=%lx clr: %x set: %x\n", addr, clr, set); in aw_ccung_modify_4()
109 reg &= ~clr; in aw_ccung_modify_4()
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| /freebsd/sys/arm64/freescale/imx/ |
| H A D | imx_ccm.c | 192 imx_ccm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in imx_ccm_modify_4() argument
200 reg &= ~clr; in imx_ccm_modify_4()
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