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Searched refs:cfg2 (Results 1 – 18 of 18) sorted by relevance

/freebsd/sys/arm64/freescale/imx/clk/
H A Dimx_clk_sscg_pll.c125 uint32_t cfg0, cfg2; in imx_clk_sscg_pll_recalc() local
132 READ4(clk, sc->offset + CFG2, &cfg2); in imx_clk_sscg_pll_recalc()
139 divr1 = (cfg2 & CFG2_DIVR1_MASK) >> CFG2_DIVR1_SHIFT; in imx_clk_sscg_pll_recalc()
140 divr2 = (cfg2 & CFG2_DIVR2_MASK) >> CFG2_DIVR2_SHIFT; in imx_clk_sscg_pll_recalc()
141 divf1 = (cfg2 & CFG2_DIVF1_MASK) >> CFG2_DIVF1_SHIFT; in imx_clk_sscg_pll_recalc()
142 divf2 = (cfg2 & CFG2_DIVF2_MASK) >> CFG2_DIVF2_SHIFT; in imx_clk_sscg_pll_recalc()
143 div = (cfg2 & CFG2_DIV_MASK) >> CFG2_DIV_SHIFT; in imx_clk_sscg_pll_recalc()
/freebsd/sys/dev/ata/chipsets/
H A Data-acerlabs.c111 switch (ctlr->chip->cfg2) { in ata_ali_chipinit()
177 if (ctlr->chip->cfg2 == ALI_SATA) { in ata_ali_chipdeinit()
201 if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) in ata_ali_ch_attach()
209 if (ctlr->chip->cfg2 & ALI_NEW) in ata_ali_ch_attach()
307 if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) { in ata_ali_setmode()
314 if (ctlr->chip->cfg2 & ALI_OLD) { in ata_ali_setmode()
H A Data-via.c153 if (ctlr->chip->cfg2 & VIASATA) { in ata_via_chipinit()
170 if (ctlr->chip->cfg2 & VIABAR) { in ata_via_chipinit()
180 if (ctlr->chip->cfg2 & VIACLK) in ata_via_chipinit()
184 if (ctlr->chip->cfg2 & VIABUG) in ata_via_chipinit()
213 if (ctlr->chip->cfg2 & VIABAR) { in ata_via_ch_attach()
270 if (ctlr->chip->cfg2 & VIABAR) { in ata_via_ch_detach()
294 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) in ata_via_reset()
319 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) { in ata_via_new_setmode()
H A Data-siliconimage.c121 if (ctlr->chip->cfg2 & SII_SETCLK) { in ata_sii_chipinit()
131 if (ctlr->chip->cfg2 & SII_4CH) { in ata_sii_chipinit()
184 if (ctlr->chip->cfg2 & SII_INTR) in ata_cmd_ch_attach()
280 if (ctlr->chip->cfg2 & SII_BUG) { in ata_sii_ch_attach()
288 if (ctlr->chip->cfg2 & SII_SETCLK) in ata_sii_ch_attach()
364 if (ctlr->chip->cfg2 & SII_SETCLK) { in ata_sii_setmode()
H A Data-jmicron.c105 ctlr->channels = ctlr->chip->cfg2; in ata_jmicron_chipinit()
123 ctlr->channels = ctlr->chip->cfg2; in ata_jmicron_chipinit()
H A Data-marvell.c107 switch (ctlr->chip->cfg2) { in ata_marvell_probe()
H A Data-serverworks.c137 ctlr->channels = ctlr->chip->cfg2; in ata_serverworks_chipinit()
H A Data-intel.c251 ctlr->channels = ctlr->chip->cfg2; in ata_intel_chipinit()
/freebsd/sys/dev/gpio/dwgpio/
H A Ddwgpio.c137 int cfg2; in dwgpio_attach() local
156 cfg2 = READ4(sc, GPIO_CONFIG_REG2); in dwgpio_attach()
157 nr_pins = (cfg2 >> ENCODED_ID_PWIDTH_S(sc->port)) & \ in dwgpio_attach()
/freebsd/sys/contrib/dev/athk/ath11k/
H A Ddebugfs_sta.c720 cfg_params.cfg2 |= FIELD_PREP(GENMASK(7, 0), sta->addr[0]); in ath11k_write_htt_peer_stats_reset()
721 cfg_params.cfg2 |= FIELD_PREP(GENMASK(15, 8), sta->addr[1]); in ath11k_write_htt_peer_stats_reset()
722 cfg_params.cfg2 |= FIELD_PREP(GENMASK(23, 16), sta->addr[2]); in ath11k_write_htt_peer_stats_reset()
723 cfg_params.cfg2 |= FIELD_PREP(GENMASK(31, 24), sta->addr[3]); in ath11k_write_htt_peer_stats_reset()
H A Ddp.h1574 u32 cfg2; member
H A Ddebugfs_htt_stats.c4673 cfg_params->cfg2 |= FIELD_PREP(GENMASK(7, 0), mac_addr[0]); in ath11k_prep_htt_stats_cfg_params()
4674 cfg_params->cfg2 |= FIELD_PREP(GENMASK(15, 8), mac_addr[1]); in ath11k_prep_htt_stats_cfg_params()
4675 cfg_params->cfg2 |= FIELD_PREP(GENMASK(23, 16), mac_addr[2]); in ath11k_prep_htt_stats_cfg_params()
4676 cfg_params->cfg2 |= FIELD_PREP(GENMASK(31, 24), mac_addr[3]); in ath11k_prep_htt_stats_cfg_params()
4699 cfg_params->cfg2 |= FIELD_PREP(GENMASK(7, 0), mac_addr[4]); in ath11k_prep_htt_stats_cfg_params()
4700 cfg_params->cfg2 |= FIELD_PREP(GENMASK(15, 8), mac_addr[5]); in ath11k_prep_htt_stats_cfg_params()
H A Ddp_tx.c1178 cmd->cfg_param2 = cfg_params->cfg2; in ath11k_dp_tx_htt_h2t_ext_stats_req()
/freebsd/sys/dev/et/
H A Dif_et.c498 uint32_t cfg1, cfg2, ctrl; in et_miibus_statchg() local
534 cfg2 = CSR_READ_4(sc, ET_MAC_CFG2); in et_miibus_statchg()
535 cfg2 &= ~(ET_MAC_CFG2_MODE_MII | ET_MAC_CFG2_MODE_GMII | in et_miibus_statchg()
537 cfg2 |= ET_MAC_CFG2_LENCHK | ET_MAC_CFG2_CRC | ET_MAC_CFG2_PADCRC | in et_miibus_statchg()
542 cfg2 |= ET_MAC_CFG2_MODE_GMII; in et_miibus_statchg()
544 cfg2 |= ET_MAC_CFG2_MODE_MII; in et_miibus_statchg()
549 cfg2 |= ET_MAC_CFG2_FDX; in et_miibus_statchg()
571 CSR_WRITE_4(sc, ET_MAC_CFG2, cfg2); in et_miibus_statchg()
/freebsd/sys/dev/ata/
H A Data-pci.h34 int cfg2; member
/freebsd/sys/dev/rtsx/
H A Drtsx.c2814 uint8_t cfg2; local
2823 cfg2 = RTSX_SD_CHECK_CRC16 | RTSX_SD_NO_WAIT_BUSY_END | RTSX_SD_RSP_LEN_6;
2825 cfg2 = RTSX_SD_CHECK_CRC16 | RTSX_SD_NO_WAIT_BUSY_END | RTSX_SD_RSP_LEN_0;
2834 cfg2 |= RTSX_SD_CALCULATE_CRC7 | RTSX_SD_CHECK_CRC7;
2845 cfg2 |= RTSX_SD_NO_CALCULATE_CRC7 | RTSX_SD_NO_CHECK_CRC7;
2873 rtsx_push_cmd(sc, RTSX_WRITE_REG_CMD, RTSX_SD_CFG2, 0xff, cfg2);
/freebsd/sys/contrib/dev/athk/ath12k/
H A Ddp.h1774 u32 cfg2; member
H A Ddp_tx.c1012 cmd->cfg_param2 = cpu_to_le32(cfg_params->cfg2); in ath12k_dp_tx_htt_h2t_ext_stats_req()