| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelperCasts.cpp | 108 B.buildZExt(Dst, Src, MachineInstr::MIFlag::NonNeg); in matchZextOfTrunc() 253 MatchInfo = [=](MachineIRBuilder &B) { B.buildZExt(Dst, Src, Flag); }; in matchExtOfExt() 271 MatchInfo = [=](MachineIRBuilder &B) { B.buildZExt(Dst, Src, Flag); }; in matchExtOfExt() 286 MatchInfo = [=](MachineIRBuilder &B) { B.buildZExt(Dst, Src, Flag); }; in matchExtOfExt()
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| H A D | CombinerHelperArtifacts.cpp | 82 B.buildZExt(Dst, Merge->getSourceReg(0)); in matchMergeXAndZero()
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| H A D | LegalizerHelper.cpp | 1655 MIRBuilder.buildZExt(DstReg, TmpReg); in narrowScalar() 2051 auto ZExt = MIRBuilder.buildZExt(Ty, VScaleBase); in narrowScalar() 2165 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1Reg).getReg(0); in widenScalarMergeValues() 2173 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg); in widenScalarMergeValues() 2586 auto RHS = IsShift ? MIRBuilder.buildZExt(WideTy, MI.getOperand(2)) in widenScalarAddSubShlSat() 3476 auto BigZExt = MIRBuilder.buildZExt(WideTy, BigVec); in widenScalar() 3477 auto SubZExt = MIRBuilder.buildZExt(SubVecWideTy, SubVec); in widenScalar() 3749 auto ZextVal = B.buildZExt(TargetTy, InsertReg); in buildBitFieldInsert() 4317 auto ZExt = MIRBuilder.buildZExt(IntTy, Trunc); in scalarizeVectorBooleanStore() 4597 auto ZExtCarryIn = MIRBuilder.buildZExt(Ty, CarryIn); in lower() [all …]
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| H A D | CallLowering.cpp | 1333 MIRBuilder.buildZExt(NewReg, ValReg); in extendRegister()
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| H A D | MachineIRBuilder.cpp | 507 MachineInstrBuilder MachineIRBuilder::buildZExt(const DstOp &Res, in buildZExt() function in MachineIRBuilder
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| H A D | CombinerHelper.cpp | 2180 Builder.buildZExt(MI.getOperand(0), NarrowShift); in applyCombineShlOfExtend() 2386 Builder.buildZExt(Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt() 5179 auto Ext = Builder.buildZExt(WideTy, NarrowBinOp); in matchNarrowBinopFeedingAnd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 760 auto Ext = MIRBuilder.buildZExt(SrcTy == s32 ? s64 : s32, Src); in legalizeUITOFP() 839 MIRBuilder.buildZExt(s32, MIRBuilder.buildLoad(s16, StackPtr, *LoadMMO)); in legalizeGETROUNDING() 842 auto Masked32 = MIRBuilder.buildZExt( in legalizeGETROUNDING()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankLegalizeHelper.cpp | 957 auto Zext = B.buildZExt({SgprRB, S32}, Reg); in applyMappingSrc() 973 auto Zext = B.buildZExt({VgprRB, S32}, Reg); in applyMappingSrc()
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| H A D | AMDGPURegisterBankInfo.cpp | 2320 B.buildZExt(NewSrcReg, MI.getOperand(4).getReg()); in applyMappingImpl() 2353 B.buildZExt(NewCondReg, CondRegs[0]); in applyMappingImpl() 2404 B.buildZExt(NewCondReg, CondReg); in applyMappingImpl()
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| H A D | AMDGPULegalizerInfo.cpp | 3975 LocalAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply() 3981 CarryAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply() 4060 Tmp = B.buildZExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1572 auto NewAmt = Helper.MIRBuilder.buildZExt(LLT::scalar(64), AmtReg); in legalizeRotate() 2059 MIRBuilder.buildZExt(Dst, Add); in legalizeCTPOP() 2079 Val = MIRBuilder.buildZExt(LLT::scalar(64), Val).getReg(0); in legalizeCTPOP() 2148 MIRBuilder.buildZExt(Dst, UADD); in legalizeCTPOP()
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| H A D | AArch64CallLowering.cpp | 447 CurVReg = MIRBuilder.buildZExt(LLT::scalar(8), CurVReg).getReg(0); in lowerReturn() 1344 MIRBuilder.buildZExt(LLT::scalar(8), OutArg.Regs[0]).getReg(0); in lowerCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVLegalizerInfo.cpp | 1050 auto ZExtSplatVal = MIB.buildZExt(InterEltTy, SplatVal); in legalizeSplatVector() 1094 auto BigZExt = MIB.buildZExt(ExtBigTy, Src); in legalizeExtractSubvector()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 761 MachineInstrBuilder buildZExt(const DstOp &Res, const SrcOp &Op,
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