Lines Matching refs:buildZExt
1392 MIRBuilder.buildZExt(DstReg, TmpReg); in narrowScalar()
1751 auto ZExt = MIRBuilder.buildZExt(Ty, VScaleBase); in narrowScalar()
1866 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1Reg).getReg(0); in widenScalarMergeValues()
1874 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg); in widenScalarMergeValues()
2288 auto RHS = IsShift ? MIRBuilder.buildZExt(WideTy, MI.getOperand(2)) in widenScalarAddSubShlSat()
3337 auto ZextVal = B.buildZExt(TargetTy, InsertReg); in buildBitFieldInsert()
3941 auto ZExtCarryIn = MIRBuilder.buildZExt(Ty, CarryIn); in lower()
3978 auto ZExtBorrowIn = MIRBuilder.buildZExt(Ty, BorrowIn); in lower()
5851 CarrySum = B.buildZExt(NarrowTy, Uaddo.getReg(1)).getReg(0); in multiplyRegisters()
5856 MachineInstrBuilder Carry = B.buildZExt(NarrowTy, Uaddo.getReg(1)); in multiplyRegisters()
7078 R = MIRBuilder.buildZExt(DstTy, R); in lowerFPTOSI()
7155 auto Lo40Set = MIRBuilder.buildZExt(S32, SigCmpNE0); in lowerFPTRUNC_F64_TO_F16()
7184 auto D1 = MIRBuilder.buildZExt(S32, D0_NE_SigSetHigh); in lowerFPTRUNC_F64_TO_F16()
7195 auto V0 = MIRBuilder.buildZExt(S32, VLow3Eq3); in lowerFPTRUNC_F64_TO_F16()
7199 auto V1 = MIRBuilder.buildZExt(S32, VLow3Gt5); in lowerFPTRUNC_F64_TO_F16()
7323 auto Zext = MIRBuilder.buildZExt(Src0Ty, Src1); in lowerFCopySign()
7455 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0); in lowerMergeValues()
7461 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg); in lowerMergeValues()
7674 auto Popcount = MIRBuilder.buildZExt(MaskTy.changeElementSize(32), Mask); in lowerVECTOR_COMPRESS()
7698 MaskI = MIRBuilder.buildZExt(IdxTy, MaskI); in lowerVECTOR_COMPRESS()
7918 Register ExtInsSrc = MIRBuilder.buildZExt(IntDstTy, InsertSrc).getReg(0); in lowerInsert()