| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 416 MIRBuilder.buildMergeLikeInstr(Val, {Load_P2Half, Load_Rem}); in legalizeCustom()
419 MIRBuilder.buildMergeLikeInstr(s64, {Load_P2Half, Load_Rem}); in legalizeCustom()
447 MIRBuilder.buildMergeLikeInstr(s64, {Src, C_HiMask.getReg(0)}); in legalizeCustom()
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| H A D | MipsCallLowering.cpp | 184 MIRBuilder.buildMergeLikeInstr(Arg.OrigRegs[0], {CopyLo, CopyHi}); in assignCustomValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2370 auto BuildPtr = B.buildMergeLikeInstr(DstTy, {SrcAsInt, ApertureReg}); in legalizeAddrSpaceCast()
2406 B.buildMergeLikeInstr(Dst, {PtrLo, HighAddr}); in legalizeAddrSpaceCast()
2539 auto SignBit64 = B.buildMergeLikeInstr(S64, {Zero32, SignBit}); in legalizeIntrinsicTrunc()
2671 Sign = B.buildMergeLikeInstr(S64, {Sign, Sign}); in legalizeFPTOI()
2673 B.buildSub(Dst, B.buildXor(S64, B.buildMergeLikeInstr(S64, {Lo, Hi}), Sign), in legalizeFPTOI()
2676 B.buildMergeLikeInstr(Dst, {Lo, Hi}); in legalizeFPTOI()
2804 B.buildMergeLikeInstr(Dst, SrcRegs); in legalizeInsertVectorElt()
3851 auto Merge = B.buildMergeLikeInstr(S32, {Src0, Src1}); in legalizeBuildVector()
3999 Tmp = B.buildMergeLikeInstr(S64, LocalAccum).getReg(0); in buildMultiply()
4163 B.buildMergeLikeInstr(DstReg, AccumRegs); in legalizeMul()
[all …]
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| H A D | AMDGPURegisterBankInfo.cpp | 752 Register Dst = B.buildMergeLikeInstr(Ty, DstParts).getReg(0); in buildReadFirstLane()
1437 B.buildMergeLikeInstr(Dst, LoadParts); in applyMappingSBufferLoad()
1497 B.buildMergeLikeInstr(DstReg, {Extract, Extend}); in applyMappingBFE()
1506 B.buildMergeLikeInstr(DstReg, {UnmergeSOffset.getReg(0), Extract}); in applyMappingBFE()
1690 B.buildMergeLikeInstr(Dst0, {DstLo, DstHi}); in applyMappingMAD_64_32()
1777 return B.buildMergeLikeInstr(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 171 MIRBuilder.buildMergeLikeInstr(DstReg, PartRegs); in insertParts()
221 MIRBuilder.buildMergeLikeInstr(DstReg, AllElts); in mergeMixedSubvectors()
338 Remerge[I] = MIRBuilder.buildMergeLikeInstr(NarrowTy, SubMerge).getReg(0); in buildLCMMergePieces()
357 MIRBuilder.buildMergeLikeInstr(DstReg, RemergeRegs); in buildWidenedRemergeToDst()
361 auto Remerge = MIRBuilder.buildMergeLikeInstr(LCMTy, RemergeRegs); in buildWidenedRemergeToDst()
375 MIRBuilder.buildMergeLikeInstr(LCMTy, RemergeRegs)); in buildWidenedRemergeToDst()
1260 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalar()
1333 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0).getReg(), Parts); in narrowScalar()
1508 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), DstRegs); in narrowScalar()
1695 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalar()
[all …]
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| H A D | CallLowering.cpp | 347 DstRegs[0], B.buildMergeLikeInstr(LCMTy, SrcRegs)); in mergeVectorRegsToResultRegs()
430 auto Widened = B.buildMergeLikeInstr(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs()
500 B.buildMergeLikeInstr(ExtendedPartTy, Regs.take_front(PartsPerElt)); in buildCopyFromRegs()
639 UnmergeSrc = B.buildMergeLikeInstr(LCMTy, MergeParts).getReg(0); in buildCopyToRegs()
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| H A D | MachineIRBuilder.cpp | 265 return buildMergeLikeInstr(Res, Regs); in buildPadVectorWithUndefElements()
289 return buildMergeLikeInstr(Res, Regs); in buildDeleteTrailingVectorElements()
655 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr() function in MachineIRBuilder
666 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr() function in MachineIRBuilder
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| H A D | Utils.cpp | 555 MIRBuilder.buildMergeLikeInstr(MainTy, MergeValues).getReg(0)); in extractParts()
625 VRegs.push_back(MIRBuilder.buildMergeLikeInstr(NarrowTy, Pieces).getReg(0)); in extractVectorParts()
635 MIRBuilder.buildMergeLikeInstr(LeftoverTy, Pieces).getReg(0)); in extractVectorParts()
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| H A D | CombinerHelper.cpp | 550 Builder.buildMergeLikeInstr(NewDstReg, Ops); in applyCombineShuffleVector()
2354 Builder.buildMergeLikeInstr(DstReg, {Narrowed, Zero}); in applyCombineShiftToUnmerge()
2367 Builder.buildMergeLikeInstr(DstReg, {Zero, Narrowed}); in applyCombineShiftToUnmerge()
2377 Builder.buildMergeLikeInstr(DstReg, {Unmerge.getReg(1), Hi}); in applyCombineShiftToUnmerge()
2383 Builder.buildMergeLikeInstr(DstReg, {Hi, Hi}); in applyCombineShiftToUnmerge()
2391 Builder.buildMergeLikeInstr(DstReg, {Lo, Hi}); in applyCombineShiftToUnmerge()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 361 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
366 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
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| H A D | AArch64LegalizerInfo.cpp | 1774 MIRBuilder.buildMergeLikeInstr( in legalizeLoadStore()
2106 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {DstLo, DstHi}); in legalizeAtomicCmpxchg128()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 415 MIRBuilder.buildMergeLikeInstr(Info.OrigRet.Regs[0], NewRegs); in lowerCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 349 MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs); in assignCustomValue()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 1047 MIB.buildMergeLikeInstr(Dst, ConcatSources); in tryCombineMergeLike()
1209 Builder.buildMergeLikeInstr(DefReg, Regs); in tryCombineUnmergeValues()
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| H A D | MachineIRBuilder.h | 1044 MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
1046 MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 278 MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs); in assignCustomValue()
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