| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankLegalizeHelper.cpp | 89 B.buildMergeLikeInstr(Dst, LoadPartRegs); in splitLoad()
103 B.buildMergeLikeInstr(Dst, MergeTyParts); in splitLoad()
131 B.buildMergeLikeInstr(Dst, MergeTyParts); in widenLoad()
281 B.buildMergeLikeInstr(Dst, {Lo, Hi}); in lowerV_BFE()
286 B.buildMergeLikeInstr(Dst, {SHRSrcLo, Hi}); in lowerV_BFE()
338 B.buildMergeLikeInstr(Dst, {Lo, Hi}); in lowerSplitTo32()
357 B.buildMergeLikeInstr(Dst, {Lo, Hi}); in lowerSplitTo32Select()
384 B.buildMergeLikeInstr(MI.getOperand(0).getReg(), {Lo, Hi}); in lowerSplitTo32SExtInReg()
434 B.buildMergeLikeInstr(MI.getOperand(0).getReg(), in lower()
459 B.buildMergeLikeInstr(BoolSrc, {AndLo, AndHi}); in lower()
|
| H A D | AMDGPUGlobalISelUtils.cpp | 146 return B.buildMergeLikeInstr({SgprRB, Ty}, SgprDstParts).getReg(0); in buildReadAnyLane()
160 B.buildMergeLikeInstr(SgprDst, SgprDstParts).getReg(0); in buildReadAnyLane()
|
| H A D | AMDGPULegalizerInfo.cpp | 2420 return B.buildMergeLikeInstr(Dst, {SrcAsInt, ApertureReg}).getReg(0); in legalizeAddrSpaceCast()
2459 B.buildMergeLikeInstr(Dst, {PtrLo, HighAddr}); in legalizeAddrSpaceCast()
2589 auto SignBit64 = B.buildMergeLikeInstr(S64, {Zero32, SignBit}); in legalizeIntrinsicTrunc()
2721 Sign = B.buildMergeLikeInstr(S64, {Sign, Sign}); in legalizeFPTOI()
2723 B.buildSub(Dst, B.buildXor(S64, B.buildMergeLikeInstr(S64, {Lo, Hi}), Sign), in legalizeFPTOI()
2726 B.buildMergeLikeInstr(Dst, {Lo, Hi}); in legalizeFPTOI()
2862 B.buildMergeLikeInstr(Dst, SrcRegs); in legalizeInsertVectorElt()
3909 auto Merge = B.buildMergeLikeInstr(S32, {Src0, Src1}); in legalizeBuildVector()
4057 Tmp = B.buildMergeLikeInstr(S64, LocalAccum).getReg(0); in buildMultiply()
4221 B.buildMergeLikeInstr(DstReg, AccumRegs); in legalizeMul()
[all …]
|
| H A D | AMDGPURegBankLegalize.cpp | 217 B.buildMergeLikeInstr(MI.getOperand(0).getReg(), in tryCombineS1AnyExt()
|
| H A D | AMDGPURegisterBankInfo.cpp | 752 Register Dst = B.buildMergeLikeInstr(Ty, DstParts).getReg(0); in buildReadFirstLane()
1465 B.buildMergeLikeInstr(Dst, LoadParts); in applyMappingSBufferLoad()
1525 B.buildMergeLikeInstr(DstReg, {Extract, Extend}); in applyMappingBFE()
1534 B.buildMergeLikeInstr(DstReg, {UnmergeSOffset.getReg(0), Extract}); in applyMappingBFE()
1718 B.buildMergeLikeInstr(Dst0, {DstLo, DstHi}); in applyMappingMAD_64_32()
1805 return B.buildMergeLikeInstr(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 416 MIRBuilder.buildMergeLikeInstr(Val, {Load_P2Half, Load_Rem}); in legalizeCustom()
419 MIRBuilder.buildMergeLikeInstr(s64, {Load_P2Half, Load_Rem}); in legalizeCustom()
447 MIRBuilder.buildMergeLikeInstr(s64, {Src, C_HiMask.getReg(0)}); in legalizeCustom()
|
| H A D | MipsCallLowering.cpp | 184 MIRBuilder.buildMergeLikeInstr(Arg.OrigRegs[0], {CopyLo, CopyHi}); in assignCustomValue()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 172 MIRBuilder.buildMergeLikeInstr(DstReg, PartRegs); in insertParts()
221 MIRBuilder.buildMergeLikeInstr(DstReg, AllElts); in mergeMixedSubvectors()
338 Remerge[I] = MIRBuilder.buildMergeLikeInstr(NarrowTy, SubMerge).getReg(0); in buildLCMMergePieces()
357 MIRBuilder.buildMergeLikeInstr(DstReg, RemergeRegs); in buildWidenedRemergeToDst()
361 auto Remerge = MIRBuilder.buildMergeLikeInstr(LCMTy, RemergeRegs); in buildWidenedRemergeToDst()
375 MIRBuilder.buildMergeLikeInstr(LCMTy, RemergeRegs)); in buildWidenedRemergeToDst()
1523 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalar()
1596 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0).getReg(), Parts); in narrowScalar()
1771 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), DstRegs); in narrowScalar()
1993 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalar()
[all …]
|
| H A D | CallLowering.cpp | 346 DstRegs[0], B.buildMergeLikeInstr(LCMTy, SrcRegs)); in mergeVectorRegsToResultRegs()
429 auto Widened = B.buildMergeLikeInstr(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs()
499 B.buildMergeLikeInstr(ExtendedPartTy, Regs.take_front(PartsPerElt)); in buildCopyFromRegs()
638 UnmergeSrc = B.buildMergeLikeInstr(LCMTy, MergeParts).getReg(0); in buildCopyToRegs()
|
| H A D | MachineIRBuilder.cpp | 265 return buildMergeLikeInstr(Res, Regs); in buildPadVectorWithUndefElements()
289 return buildMergeLikeInstr(Res, Regs); in buildDeleteTrailingVectorElements()
658 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr() function in MachineIRBuilder
669 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr() function in MachineIRBuilder
|
| H A D | Utils.cpp | 561 MIRBuilder.buildMergeLikeInstr(MainTy, MergeValues).getReg(0)); in extractParts()
631 VRegs.push_back(MIRBuilder.buildMergeLikeInstr(NarrowTy, Pieces).getReg(0)); in extractVectorParts()
641 MIRBuilder.buildMergeLikeInstr(LeftoverTy, Pieces).getReg(0)); in extractVectorParts()
|
| H A D | CombinerHelper.cpp | 616 Builder.buildMergeLikeInstr(NewDstReg, Ops); in applyCombineShuffleVector()
2455 Builder.buildMergeLikeInstr(DstReg, {Narrowed, Zero}); in applyCombineShiftToUnmerge()
2468 Builder.buildMergeLikeInstr(DstReg, {Zero, Narrowed}); in applyCombineShiftToUnmerge()
2478 Builder.buildMergeLikeInstr(DstReg, {Unmerge.getReg(1), Hi}); in applyCombineShiftToUnmerge()
2484 Builder.buildMergeLikeInstr(DstReg, {Hi, Hi}); in applyCombineShiftToUnmerge()
2492 Builder.buildMergeLikeInstr(DstReg, {Lo, Hi}); in applyCombineShiftToUnmerge()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 362 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
367 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
|
| H A D | AArch64LegalizerInfo.cpp | 1915 MIRBuilder.buildMergeLikeInstr( in legalizeLoadStore()
2247 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {DstLo, DstHi}); in legalizeAtomicCmpxchg128()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 414 MIRBuilder.buildMergeLikeInstr(Info.OrigRet.Regs[0], NewRegs); in lowerCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 349 MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs); in assignCustomValue()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 1055 MIB.buildMergeLikeInstr(Dst, ConcatSources); in tryCombineMergeLike()
1222 Builder.buildMergeLikeInstr(DefReg, Regs); in tryCombineUnmergeValues()
|
| H A D | MachineIRBuilder.h | 1098 MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
1100 MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 285 MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs); in assignCustomValue()
|