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Searched refs:buildAnyExt (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp376 Val = MIRBuilder.buildAnyExt(s32, Val).getReg(0); in legalizeCustom()
378 Val = MIRBuilder.buildAnyExt(s64, Val).getReg(0); in legalizeCustom()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp538 BVRegs.push_back(B.buildAnyExt(PartLLT, Unmerge.getReg(K)).getReg(0)); in buildCopyFromRegs()
578 B.buildAnyExt(DstRegs[i], UnmergeToEltTy.getReg(i)); in buildCopyToRegs()
605 auto Ext = B.buildAnyExt(ExtTy, SrcReg); in buildCopyToRegs()
1324 auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg); in extendRegister()
H A DInlineAsmLowering.cpp208 Src = MIRBuilder.buildAnyExt(LLT::scalar(DstSize), Src).getReg(0); in buildAnyextOrCopy()
H A DLegalizerHelper.cpp1245 MIRBuilder.buildAnyExt(DstReg, ImplicitReg); in narrowScalar()
1365 MIRBuilder.buildAnyExt(DstReg, TmpReg); in narrowScalar()
2000 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
2029 WideSrc = MIRBuilder.buildAnyExt(LCMTy, WideSrc).getReg(0); in widenScalarUnmergeValues()
2131 Src = MIRBuilder.buildAnyExt(WideTy, Src); in widenScalarExtract()
2287 auto LHS = MIRBuilder.buildAnyExt(WideTy, MI.getOperand(1)); in widenScalarAddSubShlSat()
2289 : MIRBuilder.buildAnyExt(WideTy, MI.getOperand(2)); in widenScalarAddSubShlSat()
3634 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in lowerStore()
6126 MIRBuilder.buildAnyExt(SrcReg, SrcRegs[I]); in narrowScalarInsert()
H A DMachineIRBuilder.cpp495 MachineInstrBuilder MachineIRBuilder::buildAnyExt(const DstOp &Res, in buildAnyExt() function in MachineIRBuilder
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp354 CvtSrc = B.buildAnyExt(S32, CvtSrc).getReg(0); in applyCvtF32UByteN()
H A DAMDGPULegalizerInfo.cpp3996 Tmp = B.buildAnyExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
4200 auto Extend = B.buildAnyExt(S32, {Src}).getReg(0u); in legalizeCTLZ_ZERO_UNDEF()
5478 Src0 = B.buildAnyExt(S32, Src0).getReg(0); in legalizeLaneOp()
5481 Src1 = B.buildAnyExt(LLT::scalar(32), Src1).getReg(0); in legalizeLaneOp()
5484 Src2 = B.buildAnyExt(LLT::scalar(32), Src2).getReg(0); in legalizeLaneOp()
5590 auto ExtStride = B.buildAnyExt(S32, Stride); in legalizePointerAsRsrcIntrin()
5728 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
5790 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
7464 MI.getOperand(5).setReg(B.buildAnyExt(S32, Index).getReg(0)); in legalizeIntrinsic()
7473 MI.getOperand(7).setReg(B.buildAnyExt(S32, Index).getReg(0)); in legalizeIntrinsic()
H A DAMDGPUCallLowering.cpp39 return Handler.MIRBuilder.buildAnyExt(LLT::scalar(32), ValVReg).getReg(0); in extendRegisterMin32()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp111 ValVReg = MIRBuilder.buildAnyExt(DstTy, ValVReg).getReg(0); in assignValueToReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp422 auto Ext = Builder.buildAnyExt(LLT::scalar(32), MI.getOperand(2).getReg()); in applyMappingImpl()
H A DAArch64LegalizerInfo.cpp1549 Register ExtValueReg = MIB.buildAnyExt(LLT::scalar(64), Value).getReg(0); in legalizeIntrinsic()
2132 MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0); in legalizeMemOps()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h674 MachineInstrBuilder buildAnyExt(const DstOp &Res, const SrcOp &Op);