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Searched refs:_reg (Results 1 – 25 of 64) sorted by relevance

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/freebsd/sys/dev/axgbe/
H A Dxgbe-common.h1504 #define XGMAC_IOREAD(_pdata, _reg) \
1505 bus_read_4((_pdata)->xgmac_res, _reg)
1507 #define XGMAC_IOREAD_BITS(_pdata, _reg, _field) \
1508 GET_BITS(XGMAC_IOREAD((_pdata), _reg), \
1509 _reg##_##_field##_INDEX, \
1510 _reg##_##_field##_WIDTH)
1512 #define XGMAC_IOWRITE(_pdata, _reg, _val) \ argument
1513 bus_write_4((_pdata)->xgmac_res, _reg, (_val))
1515 #define XGMAC_IOWRITE_BITS(_pdata, _reg, _field, _val) \
1517 uint32_t reg_val = XGMAC_IOREAD((_pdata), _reg); \
1488 XGMAC_IOREAD(_pdata,_reg) global() argument
1491 XGMAC_IOREAD_BITS(_pdata,_reg,_field) global() argument
1496 XGMAC_IOWRITE(_pdata,_reg,_val) global() argument
1499 XGMAC_IOWRITE_BITS(_pdata,_reg,_field,_val) global() argument
1516 XGMAC_MTL_IOREAD_BITS(_pdata,_n,_reg,_field) global() argument
1521 XGMAC_MTL_IOWRITE(_pdata,_n,_reg,_val) global() argument
1525 XGMAC_MTL_IOWRITE_BITS(_pdata,_n,_reg,_field,_val) global() argument
1538 XGMAC_DMA_IOREAD(_channel,_reg) global() argument
1541 XGMAC_DMA_IOREAD_BITS(_channel,_reg,_field) global() argument
1546 XGMAC_DMA_IOWRITE(_channel,_reg,_val) global() argument
1550 XGMAC_DMA_IOWRITE_BITS(_channel,_reg,_field,_val) global() argument
1597 XSIR0_IOREAD(_pdata,_reg) global() argument
1600 XSIR0_IOREAD_BITS(_pdata,_reg,_field) global() argument
1605 XSIR0_IOWRITE(_pdata,_reg,_val) global() argument
1608 XSIR0_IOWRITE_BITS(_pdata,_reg,_field,_val) global() argument
1617 XSIR1_IOREAD(_pdata,_reg) global() argument
1620 XSIR1_IOREAD_BITS(_pdata,_reg,_field) global() argument
1625 XSIR1_IOWRITE(_pdata,_reg,_val) global() argument
1628 XSIR1_IOWRITE_BITS(_pdata,_reg,_field,_val) global() argument
1640 XRXTX_IOREAD(_pdata,_reg) global() argument
1643 XRXTX_IOREAD_BITS(_pdata,_reg,_field) global() argument
1648 XRXTX_IOWRITE(_pdata,_reg,_val) global() argument
1651 XRXTX_IOWRITE_BITS(_pdata,_reg,_field,_val) global() argument
1673 XP_IOREAD(_pdata,_reg) global() argument
1676 XP_IOREAD_BITS(_pdata,_reg,_field) global() argument
1681 XP_IOWRITE(_pdata,_reg,_val) global() argument
1685 XP_IOWRITE_BITS(_pdata,_reg,_field,_val) global() argument
1707 XI2C_IOREAD(_pdata,_reg) global() argument
1710 XI2C_IOREAD_BITS(_pdata,_reg,_field) global() argument
1715 XI2C_IOWRITE(_pdata,_reg,_val) global() argument
1719 XI2C_IOWRITE_BITS(_pdata,_reg,_field,_val) global() argument
1733 XMDIO_READ(_pdata,_mmd,_reg) global() argument
1737 XMDIO_READ_BITS(_pdata,_mmd,_reg,_mask) global() argument
1740 XMDIO_WRITE(_pdata,_mmd,_reg,_val) global() argument
1744 XMDIO_WRITE_BITS(_pdata,_mmd,_reg,_mask,_val) global() argument
[all...]
/freebsd/sys/dev/bhnd/cores/pmu/
H A Dbhnd_pmu_private.h34 #define BHND_PMU_READ_4(_sc, _reg) (_sc)->io->rd4((_reg), (_sc)->io_ctx) argument
35 #define BHND_PMU_WRITE_4(_sc, _reg, _val) \ argument
36 (_sc)->io->wr4((_reg), (_val), (_sc)->io_ctx)
38 #define BHND_PMU_AND_4(_sc, _reg, _val) \ argument
39 BHND_PMU_WRITE_4((_sc), (_reg), \
40 BHND_PMU_READ_4((_sc), (_reg)) & (_val))
41 #define BHND_PMU_OR_4(_sc, _reg, _val) \ argument
42 BHND_PMU_WRITE_4((_sc), (_reg), \
43 BHND_PMU_READ_4((_sc), (_reg)) | (_val))
46 #define BHND_PMU_IND_READ(_sc, _src, _reg) \ argument
[all …]
/freebsd/sys/dev/sfxge/common/
H A Defx_impl.h866 #define EFX_CHECK_REG(_enp, _reg) \ argument
868 const char *name = #_reg; \
901 #define EFX_CHECK_REG(_enp, _reg) do { \ argument
906 #define EFX_BAR_READD(_enp, _reg, _edp, _lock) \ argument
908 EFX_CHECK_REG((_enp), (_reg)); \
909 EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST, \
911 EFSYS_PROBE3(efx_bar_readd, const char *, #_reg, \
912 uint32_t, _reg ## _OFST, \
917 #define EFX_BAR_WRITED(_enp, _reg, _edp, _lock) \ argument
919 EFX_CHECK_REG((_enp), (_reg)); \
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/freebsd/sys/arm/freescale/vybrid/
H A Dvf_common.h29 #define READ4(_sc, _reg) \ argument
30 bus_space_read_4(_sc->bst, _sc->bsh, _reg)
31 #define WRITE4(_sc, _reg, _val) \ argument
32 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
33 #define READ2(_sc, _reg) \ argument
34 bus_space_read_2(_sc->bst, _sc->bsh, _reg)
35 #define WRITE2(_sc, _reg, _val) \ argument
36 bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val)
37 #define READ1(_sc, _reg) \ argument
38 bus_space_read_1(_sc->bst, _sc->bsh, _reg)
[all …]
H A Dvf_edma.h111 #define TCD_READ4(_sc, _reg) \ argument
112 bus_space_read_4(_sc->bst_tcd, _sc->bsh_tcd, _reg)
113 #define TCD_WRITE4(_sc, _reg, _val) \ argument
114 bus_space_write_4(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
115 #define TCD_READ2(_sc, _reg) \ argument
116 bus_space_read_2(_sc->bst_tcd, _sc->bsh_tcd, _reg)
117 #define TCD_WRITE2(_sc, _reg, _val) \ argument
118 bus_space_write_2(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
119 #define TCD_READ1(_sc, _reg) \ argument
120 bus_space_read_1(_sc->bst_tcd, _sc->bsh_tcd, _reg)
[all …]
H A Dvf_dmamux.h44 #define MUX_READ1(_sc, _mux, _reg) \ argument
45 bus_space_read_1(_sc->bst[_mux], _sc->bsh[_mux], _reg)
47 #define MUX_WRITE1(_sc, _mux, _reg, _val) \ argument
48 bus_space_write_1(_sc->bst[_mux], _sc->bsh[_mux], _reg, _val)
H A Dvf_ehci.c110 #define PHY_READ4(_sc, _reg) \ argument
111 bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
112 #define PHY_WRITE4(_sc, _reg, _val) \ argument
113 bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
115 #define USBC_READ4(_sc, _reg) \ argument
116 bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
117 #define USBC_WRITE4(_sc, _reg, _val) \ argument
118 bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
/freebsd/sys/dev/ath/
H A Dah_osdep.h91 #define OS_REG_UNSWAPPED(_reg) \ argument
92 (((_reg) >= 0x4000 && (_reg) < 0x5000) || \
93 ((_reg) >= 0x7000 && (_reg) < 0x8000))
95 #define OS_REG_UNSWAPPED(_reg) (0) argument
130 #define OS_BUS_BARRIER_REG(_ah, _reg, _t) \ argument
131 OS_BUS_BARRIER((_ah), (_reg), 4, (_t))
137 #define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) argument
138 #define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg) argument
/freebsd/sys/dev/clk/spacemit/
H A Dk1_clk.h34 #define K1_CLK_GATE(_clkname, _id, _reg, _gate_bit, ...) \ argument
37 .reg = _reg, \
41 #define K1_CLK_DIV(_clkname, _id, _reg, _div_bits, _div_shift, \ argument
45 .reg = _reg, \
51 #define K1_CLK_DIV_MUX(_clkname, _id, _reg, _div_bits, \ argument
55 .reg = _reg, \
63 #define K1_CLK_DIV_GATE(_clkname, _id, _reg, _div_bits, _div_shift, \ argument
67 .reg = _reg, \
73 #define K1_CLK_MUX_GATE(_clkname, _id, _reg, _mux_nbits, _mux_shift, \ argument
77 .reg = _reg, \
[all …]
/freebsd/sys/dev/bhnd/cores/pci/
H A Dbhnd_pci_hostb.c176 #define BHND_PCI_READ_2(_sc, _reg) \ argument
177 bhnd_bus_read_2(BHND_PCI_SOFTC(_sc)->mem_res, (_reg))
179 #define BHND_PCI_READ_4(_sc, _reg) \ argument
180 bhnd_bus_read_4(BHND_PCI_SOFTC(_sc)->mem_res, (_reg))
182 #define BHND_PCI_WRITE_2(_sc, _reg, _val) \ argument
183 bhnd_bus_write_2(BHND_PCI_SOFTC(_sc)->mem_res, (_reg), (_val))
185 #define BHND_PCI_WRITE_4(_sc, _reg, _val) \ argument
186 bhnd_bus_write_4(BHND_PCI_SOFTC(_sc)->mem_res, (_reg), (_val))
188 #define BHND_PCI_PROTO_READ_4(_sc, _reg) \ argument
189 bhnd_pcie_read_proto_reg(BHND_PCI_SOFTC(_sc), (_reg))
[all …]
/freebsd/sys/dev/xilinx/
H A Daxidma.c52 #define AXIDMA_RD4(_sc, _reg) \ argument
53 bus_space_read_4(_sc->bst, _sc->bsh, _reg)
54 #define AXIDMA_WR4(_sc, _reg, _val) \ argument
55 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
56 #define AXIDMA_RD8(_sc, _reg) \ argument
57 bus_space_read_8(_sc->bst, _sc->bsh, _reg)
58 #define AXIDMA_WR8(_sc, _reg, _val) \ argument
59 bus_space_write_8(_sc->bst, _sc->bsh, _reg, _val)
H A Daxi_quad_spi.c64 #define READ4(_sc, _reg) \ argument
65 bus_space_read_4(_sc->bst, _sc->bsh, _reg)
66 #define WRITE4(_sc, _reg, _val) \ argument
67 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
H A Dif_xae.c72 #define XAE_RD4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) argument
73 #define XAE_RD8(_sc, _reg) bus_read_8((_sc)->res[0], _reg) argument
74 #define XAE_WR4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
75 #define XAE_WR8(_sc, _reg, _val) bus_write_8((_sc)->res[0], _reg, _val) argument
77 #define AXIDMA_RD4(_sc, _reg) bus_read_4((_sc)->dma_res, _reg) argument
78 #define AXIDMA_RD8(_sc, _reg) bus_read_8((_sc)->dma_res, _reg) argument
79 #define AXIDMA_WR4(_sc, _reg, _val) bus_write_4((_sc)->dma_res, _reg, _val) argument
80 #define AXIDMA_WR8(_sc, _reg, _val) bus_write_8((_sc)->dma_res, _reg, _val) argument
/freebsd/sys/dev/flash/
H A Dcqspi.c80 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) argument
81 #define READ2(_sc, _reg) bus_read_2((_sc)->res[0], _reg) argument
82 #define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg) argument
83 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
84 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument
85 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
86 #define READ_DATA_4(_sc, _reg) bus_read_4((_sc)->res[1], _reg) argument
87 #define READ_DATA_1(_sc, _reg) bus_read_1((_sc)->res[1], _reg) argument
88 #define WRITE_DATA_4(_sc, _reg, _val) bus_write_4((_sc)->res[1], _reg, _val) argument
89 #define WRITE_DATA_1(_sc, _reg, _val) bus_write_1((_sc)->res[1], _reg, _val) argument
/freebsd/sys/dev/etherswitch/mtkswitch/
H A Dmtkswitchvar.h128 #define MTKSWITCH_READ(_sc, _reg) \ argument
129 bus_read_4((_sc)->sc_res, (_reg))
130 #define MTKSWITCH_WRITE(_sc, _reg, _val) \ argument
131 bus_write_4((_sc)->sc_res, (_reg), (_val))
132 #define MTKSWITCH_MOD(_sc, _reg, _clr, _set) \ argument
133 MTKSWITCH_WRITE((_sc), (_reg), \
134 ((MTKSWITCH_READ((_sc), (_reg)) & ~(_clr)) | (_set))
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312reg.h30 #define REG_WRITE(_reg,_val) *((volatile uint32_t *)(_reg)) = (_val); argument
31 #define REG_READ(_reg) *((volatile uint32_t *)(_reg)) argument
/freebsd/sys/arm/freescale/imx/
H A Dimx6_audmux.c52 #define READ4(_sc, _reg) \ argument
53 bus_space_read_4(_sc->bst, _sc->bsh, _reg)
54 #define WRITE4(_sc, _reg, _val) \ argument
55 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
/freebsd/sys/dev/iicbus/controller/vybrid/
H A Dvf_i2c.c87 #define READ1(_sc, _reg) bus_space_read_1(_sc->bst, _sc->bsh, _reg) argument
88 #define WRITE1(_sc, _reg, _val) bus_space_write_1(_sc->bst,\ argument
89 _sc->bsh, _reg, _val)
96 #define WRITE1(_sc, _reg, _val) ({\ argument
97 vf_i2c_dbg(_sc, "WRITE1 REG 0x%02X VAL 0x%02X\n",_reg,_val);\
98 bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val);\
101 #define READ1(_sc, _reg) ({\ argument
102 uint32_t ret=bus_space_read_1(_sc->bst, _sc->bsh, _reg);\
103 vf_i2c_dbg(_sc, "READ1 REG 0x%02X RETURNS 0x%02X\n",_reg,ret);\
/freebsd/sys/dev/dwc/
H A Dif_dwcvar.h118 #define READ4(_sc, _reg) \ argument
119 bus_read_4((_sc)->res[0], _reg)
120 #define WRITE4(_sc, _reg, _val) \ argument
121 bus_write_4((_sc)->res[0], _reg, _val)
/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipc_gpiovar.h107 #define CC_GPIO_UPDATE(_upd, _pin, _reg, _val) do { \ argument
108 (_upd)->_reg.mask |= (1 << (_pin)); \
110 (_upd)->_reg.value |= (1 << (_pin)); \
112 (_upd)->_reg.value &= ~(1 << (_pin)); \
/freebsd/sys/riscv/eswin/
H A Deswin_reset.c63 #define ERST_READ(_sc, _reg) \ argument
64 SYSCON_READ_4(sc->syscon, (_reg))
65 #define ERST_WRITE(_sc, _reg, _val) \ argument
66 SYSCON_WRITE_4(sc->syscon, (_reg), (_val))
/freebsd/sys/arm64/arm64/
H A Didentcpu.c354 #define MRS_FIELD_VALUE_NONE_IMPL(_reg, _field, _none, _impl) \ argument
355 MRS_FIELD_VALUE(_reg ## _ ## _field ## _ ## _none, ""), \
356 MRS_FIELD_VALUE(_reg ## _ ## _field ## _ ## _impl, #_field)
358 #define MRS_FIELD_VALUE_COUNT(_reg, _field, _desc) \ argument
359 MRS_FIELD_VALUE(0ul << _reg ## _ ## _field ## _SHIFT, "1 " _desc), \
360 MRS_FIELD_VALUE(1ul << _reg ## _ ## _field ## _SHIFT, "2 " _desc "s"), \
361 MRS_FIELD_VALUE(2ul << _reg ## _ ## _field ## _SHIFT, "3 " _desc "s"), \
362 MRS_FIELD_VALUE(3ul << _reg ## _ ## _field ## _SHIFT, "4 " _desc "s"), \
363 MRS_FIELD_VALUE(4ul << _reg ## _ ## _field ## _SHIFT, "5 " _desc "s"), \
364 MRS_FIELD_VALUE(5ul << _reg ## _ ## _field ## _SHIFT, "6 " _desc "s"), \
[all …]
/freebsd/sys/arm64/vmm/
H A Dvmm.c456 #define SPECIAL_REG(_reg, _read, _write) \ argument
458 .esr_iss = ((_reg ## _op0) << ISS_MSR_OP0_SHIFT) | \
459 ((_reg ## _op1) << ISS_MSR_OP1_SHIFT) | \
460 ((_reg ## _CRn) << ISS_MSR_CRn_SHIFT) | \
461 ((_reg ## _CRm) << ISS_MSR_CRm_SHIFT) | \
462 ((_reg ## _op2) << ISS_MSR_OP2_SHIFT), \
468 #define ID_SPECIAL_REG(_reg, _name) \ argument
470 .esr_iss = ((_reg ## _op0) << ISS_MSR_OP0_SHIFT) | \
471 ((_reg ## _op1) << ISS_MSR_OP1_SHIFT) | \
472 ((_reg ## _CRn) << ISS_MSR_CRn_SHIFT) | \
[all …]
/freebsd/tools/tools/ath/common/
H A Dah_osdep.h59 #define OS_REG_WRITE(_ah, _reg, _val) argument
60 #define OS_REG_READ(_ah, _reg) 0 argument
/freebsd/sys/arm/arm/
H A Dgic.c152 #define gic_c_read_4(_sc, _reg) \ argument
153 bus_read_4((_sc)->gic_res[GIC_RES_CPU], (_reg))
154 #define gic_c_peek_4(_sc, _reg, _val) \ argument
155 bus_peek_4((_sc)->gic_res[GIC_RES_CPU], (_reg), (_val))
156 #define gic_c_write_4(_sc, _reg, _val) \ argument
157 bus_write_4((_sc)->gic_res[GIC_RES_CPU], (_reg), (_val))
159 #define gic_d_read_4(_sc, _reg) \ argument
160 bus_read_4((_sc)->gic_res[GIC_RES_DIST], (_reg))
161 #define gic_d_write_1(_sc, _reg, _val) \ argument
162 bus_write_1((_sc)->gic_res[GIC_RES_DIST], (_reg), (_val))
[all …]

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