1f3a72e40SRuslan Bukin /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3af3dc4a7SPedro F. Giffuni * 4f3a72e40SRuslan Bukin * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 5f3a72e40SRuslan Bukin * All rights reserved. 6f3a72e40SRuslan Bukin * 7f3a72e40SRuslan Bukin * Redistribution and use in source and binary forms, with or without 8f3a72e40SRuslan Bukin * modification, are permitted provided that the following conditions 9f3a72e40SRuslan Bukin * are met: 10f3a72e40SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 11f3a72e40SRuslan Bukin * notice, this list of conditions and the following disclaimer. 12f3a72e40SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 13f3a72e40SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 14f3a72e40SRuslan Bukin * documentation and/or other materials provided with the distribution. 15f3a72e40SRuslan Bukin * 16f3a72e40SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17f3a72e40SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18f3a72e40SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19f3a72e40SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20f3a72e40SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21f3a72e40SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22f3a72e40SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23f3a72e40SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24f3a72e40SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25f3a72e40SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26f3a72e40SRuslan Bukin * SUCH DAMAGE. 27f3a72e40SRuslan Bukin */ 28f3a72e40SRuslan Bukin 29f3a72e40SRuslan Bukin int dmamux_configure(int mux, int source, int channel, int enable); 30f3a72e40SRuslan Bukin 31f3a72e40SRuslan Bukin enum mux_num { 32f3a72e40SRuslan Bukin MUX0, 33f3a72e40SRuslan Bukin MUX1, 34f3a72e40SRuslan Bukin MUX2, 35f3a72e40SRuslan Bukin MUX3, 36f3a72e40SRuslan Bukin }; 37f3a72e40SRuslan Bukin 38f3a72e40SRuslan Bukin enum mux_grp { 39f3a72e40SRuslan Bukin MUXGRP0, /* MUX[0,3] */ 40f3a72e40SRuslan Bukin MUXGRP1, /* MUX[1,2] */ 41f3a72e40SRuslan Bukin }; 42f3a72e40SRuslan Bukin 43f3a72e40SRuslan Bukin /* DMAMUX */ 44f3a72e40SRuslan Bukin #define MUX_READ1(_sc, _mux, _reg) \ 45f3a72e40SRuslan Bukin bus_space_read_1(_sc->bst[_mux], _sc->bsh[_mux], _reg) 46f3a72e40SRuslan Bukin 47f3a72e40SRuslan Bukin #define MUX_WRITE1(_sc, _mux, _reg, _val) \ 48f3a72e40SRuslan Bukin bus_space_write_1(_sc->bst[_mux], _sc->bsh[_mux], _reg, _val) 49