/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/ |
H A D | regs.h | 200 #define MT_WF_PHY_R0_PHYMUX_5(_phy) MT_WF_PHY(0x0614 + ((_phy) << 9)) argument 203 #define MT_WF_PHY_R0_PHYCTRL_STS0(_phy) MT_WF_PHY(0x020c + ((_phy) << 9)) argument 207 #define MT7663_WF_PHY_R0_PHYCTRL_STS0(_phy) MT_WF_PHY(0x0210 + ((_phy) << 12)) argument 209 #define MT_WF_PHY_R0_PHYCTRL_STS5(_phy) MT_WF_PHY(0x0220 + ((_phy) << 9)) argument 213 #define MT7663_WF_PHY_R0_PHYCTRL_STS5(_phy) MT_WF_PHY(0x0224 + ((_phy) << 12)) argument 215 #define MT_WF_PHY_GID_TAB_VLD(_phy, i) MT_WF_PHY(0x0254 + (i) * 4 + \ argument 216 ((_phy) << 9)) 217 #define MT7663_WF_PHY_GID_TAB_VLD(_phy, i) MT_WF_PHY(0x0254 + (i) * 4 + \ argument 218 ((_phy) << 12)) 219 #define MT_WF_PHY_GID_TAB_POS(_phy, i) MT_WF_PHY(0x025c + (i) * 4 + \ argument [all …]
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/freebsd/sys/dev/axgbe/ |
H A D | xgbe.h | 361 #define XGBE_ZERO_SUP(_phy) \ argument 362 ((_phy)->supported = 0) 364 #define XGBE_SET_SUP(_phy, _mode) \ argument 365 ((_phy)->supported |= SUPPORTED_##_mode) 367 #define XGBE_CLR_SUP(_phy, _mode) \ argument 368 ((_phy)->supported &= ~SUPPORTED_##_mode) 370 #define XGBE_IS_SUP(_phy, _mode) \ argument 371 ((_phy)->supported & SUPPORTED_##_mode) 373 #define XGBE_ZERO_ADV(_phy) \ argument 374 ((_phy) 376 XGBE_SET_ADV(_phy,_mode) global() argument 379 XGBE_CLR_ADV(_phy,_mode) global() argument 382 XGBE_ADV(_phy,_mode) global() argument 385 XGBE_ZERO_LP_ADV(_phy) global() argument 388 XGBE_SET_LP_ADV(_phy,_mode) global() argument 391 XGBE_CLR_LP_ADV(_phy,_mode) global() argument 394 XGBE_LP_ADV(_phy,_mode) global() argument [all...] |
/freebsd/sys/dev/bhnd/cores/pci/ |
H A D | bhnd_pci_hostb.c | 194 #define BHND_PCI_MDIO_READ(_sc, _phy, _reg) \ argument 195 bhnd_pcie_mdio_read(BHND_PCI_SOFTC(_sc), (_phy), (_reg)) 197 #define BHND_PCI_MDIO_WRITE(_sc, _phy, _reg, _val) \ argument 198 bhnd_pcie_mdio_write(BHND_PCI_SOFTC(_sc), (_phy), (_reg), (_val)) 200 #define BHND_PCI_MDIO_READ_EXT(_sc, _phy, _devaddr, _reg) \ argument 201 bhnd_pcie_mdio_read_ext(BHND_PCI_SOFTC(_sc), (_phy), (_devaddr), (_reg)) 203 #define BHND_PCI_MDIO_WRITE_EXT(_sc, _phy, _devaddr, _reg, _val) \ argument 204 bhnd_pcie_mdio_write_ext(BHND_PCI_SOFTC(_sc), (_phy), \
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/ |
H A D | regs.h | 1200 #define MT_WF_PHY_RX_CTRL1(_phy) MT_WF_PHY(0x2004 + ((_phy) << 16)) argument 1201 #define MT_WF_PHY_RX_CTRL1_MT7916(_phy) MT_WF_PHY(0x2004 + ((_phy) << 20)) argument 1205 #define MT_WF_PHY_RXTD12(_phy) MT_WF_PHY(0x8230 + ((_phy) << 16)) argument 1206 #define MT_WF_PHY_RXTD12_MT7916(_phy) MT_WF_PHY(0x8230 + ((_phy) << 20)) argument 1210 #define MT_WF_PHY_TPC_CTRL_STAT(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 16)) argument 1211 #define MT_WF_PHY_TPC_CTRL_STAT_MT7916(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 20)) argument
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/freebsd/sys/dev/bxe/ |
H A D | bxe_elink.c | 934 #define CL22_WR_OVER_CL45(_sc, _phy, _bank, _addr, _val) \ argument 935 elink_cl45_write(_sc, _phy, \ 936 (_phy)->def_md_devad, \ 940 #define CL22_RD_OVER_CL45(_sc, _phy, _bank, _addr, _val) \ argument 941 elink_cl45_read(_sc, _phy, \ 942 (_phy)->def_md_devad, \
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