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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha1-ia64.pl62 my $Xn=@X[$j%16];
73 { .mmi; ld1 $Xn=[inp],2 // forward Xload
92 dep $Xn=$Xn,tmp2,8,8 // forward Xload
108 { .mmi; xor $Xn=$Xn,$X[($j+2)%16] // forward Xupdate
112 xor $Xn=$Xn,tmp3 // forward Xupdate
117 shrp $Xn=$Xn,$Xn,31 // ROTATE(x[0]^x[2]^x[8]^x[13],1)
128 my $Xn=@X[$j%16];
138 { .mmi; xor $Xn=$Xn,$X[($j+2)%16] // forward Xupdate
142 xor $Xn=$Xn,tmp3 // forward Xupdate
147 shrp $Xn=$Xn,$Xn,31 // ROTATE(x[0]^x[2]^x[8]^x[13],1)
[all …]
H A Dsha256-mb-x86_64.pl104 ($t1,$t2,$t3,$axb,$bxc,$Xi,$Xn,$sigma)=map("%xmm$_",(0..7));
142 `"pshufb $Xn,$Xi" if ($i<=15 && ($i&1)==0)`
144 `"pshufb $Xn,$Xi" if ($i<=15 && ($i&1)==1)`
210 movdqa `&Xi_off($i+1)`,$Xn
213 movdqa $Xn,$sigma
214 movdqa $Xn,$t2
216 movdqa $Xn,$t3
243 ($Xi,$Xn)=($Xn,$Xi);
326 movdqu .Lpbswap(%rip),$Xn
355 movdqa $sigma,$Xn
[all …]
H A Dsha256-c64xplus.pl42 ($Xn,$X0,$K)=("B7","B8","B9");
102 LDNW *$INP++,$Xn ; pre-fetch input
117 || SWAP4 $Xn,$X0
123 LDNW *$INP++,$Xn
151 || SWAP4 $Xn,$X0
167 || LDW *${Xib}[1],$Xn ; modulo-scheduled
193 || MV $Xn,$X0 ; modulo-scheduled
211 || MV $X1,$Xn
245 || MV $Xn,$X0 ; modulo-scheduled
262 || [A0] LDNW *$INP++,$Xn ; pre-fetch input
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrFormats.td21 /// 10 M68000 (d8,An,Xn.L) f address register indirect with index and scale = 1
22 /// 07 M68000 (d8,An,Xn.W) F address register indirect with index and scale = 1
23 /// 12 M68020 (d8,An,Xn.L,SCALE) g address register indirect with index
24 /// 11 M68020 (d8,An,Xn.W,SCALE) G address register indirect with index
25 /// 14 M68020 ([bd,An],Xn.L,SCALE,od) u memory indirect postindexed mode
26 /// 13 M68020 ([bd,An],Xn.W,SCALE,od) U memory indirect postindexed mode
27 /// 16 M68020 ([bd,An,Xn.L,SCALE],od) v memory indirect preindexed mode
28 /// 15 M68020 ([bd,An,Xn.W,SCALE],od) V memory indirect preindexed mode
32 /// 23 M68000 (d8,PC,Xn.L) k program counter with index and scale = 1
33 /// 22 M68000 (d8,PC,Xn
[all...]
H A DM68kInstrData.td68 // Special encoding for Xn
80 // Xn
86 // (i,PC,Xn)
90 // (i,An,Xn)
H A DM68kInstrInfo.td683 // (i,An,Xn)
695 // (i,PC,Xn)
710 // Xn
H A DM68kInstrArithmetic.td881 // add (i,An,Xn), reg
949 // sub (i,An,Xn), reg
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SLSHardening.cpp79 static unsigned indexOfXReg(Register Xn);
95 bool get(ThunkKind::ThunkKindId Kind, Register Xn, Register Xm) { in get() argument
96 reg_bitmask_t XnBit = reg_bitmask_t(1) << indexOfXReg(Xn); in get()
100 void set(ThunkKind::ThunkKindId Kind, Register Xn, Register Xm) { in set() argument
101 reg_bitmask_t XnBit = reg_bitmask_t(1) << indexOfXReg(Xn); in set()
279 static SmallString<32> createThunkName(const ThunkKind &Kind, Register Xn, in createThunkName() argument
281 unsigned N = ThunksSet::indexOfXReg(Xn); in createThunkName()
321 Register Xn = ParseRegName(XnStr); in parseThunkName() local
324 return std::make_tuple(std::ref(Kind), Xn, Xm); in parseThunkName()
330 Register Xn, Xm; in populateThunk() local
[all …]
H A DAArch64SchedCyclone.td123 // ADD Xd, Xn, #0
158 // EXAMPLE: ADDrs Xn, Xm LSL #imm
166 // EXAMPLE: ADDXre Xn, Xm, UXTB #1
178 // EXTR Xn, Xm, #imm
186 // EXTR Xn, Xm, #imm
243 // EXAMPLE: LDR Xn, Xm [, lsl 3]
249 // EXAMPLE: STR Xn, Xm [, lsl 3]
255 // Read the (unshifted) base register Xn in the second micro-op one cycle later.
256 // EXAMPLE: LDR Xn, Xm [, lsl 3]
H A DAArch64SchedPredNeoverse.td69 // MOV Xd, Xn
H A DAArch64InstrInfo.td8933 def : Pat<(v8i8 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
8934 def : Pat<(v4i16 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
8935 def : Pat<(v2i32 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
8936 def : Pat<(v4f16 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
8937 def : Pat<(v4bf16 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
8938 def : Pat<(v2f32 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
8956 def : Pat<(v8i8 (bitconvert GPR64:$Xn)),
8957 (REV64v8i8 (COPY_TO_REGCLASS GPR64:$Xn, FPR64))>;
8958 def : Pat<(v4i16 (bitconvert GPR64:$Xn)),
8959 (REV64v4i16 (COPY_TO_REGCLASS GPR64:$Xn, FPR64))>;
[all …]
H A DAArch64InstrFormats.td11751 // CAS{<order>}[<size>] <Ws>, <Wt>, [<Xn|SP>]
11752 // CAS{<order>} <Xs>, <Xt>, [<Xn|SP>]
11753 // CASP{<order>} <Ws>, <W(s+1)>, <Wt>, <W(t+1)>, [<Xn|SP>]
11754 // CASP{<order>} <Xs>, <X(s+1)>, <Xt>, <X(t+1)>, [<Xn|SP>]
11755 // SWP{<order>}[<size>] <Ws>, <Wt>, [<Xn|SP>]
11756 // SWP{<order>} <Xs>, <Xt>, [<Xn|SP>]
11757 // LD<OP>{<order>}[<size>] <Ws>, <Wt>, [<Xn|SP>]
11758 // LD<OP>{<order>} <Xs>, <Xt>, [<Xn|SP>]
11759 // ST<OP>{<order>}[<size>] <Ws>, [<Xn|SP>]
11760 // ST<OP>{<order>} <Xs>, [<Xn|SP>]
[all …]
H A DAArch64SVEInstrInfo.td1037 …def : Pat<(vt1 (op (vt1 (vector_insert_subvec (vt1 undef), (vt2 (load GPR64sp:$Xn)), (i64 0))), (i…
1038 (load_instr_imm (ptrue 31), GPR64sp:$Xn, 0)>;
1040 …def : Pat<(vt1 (op (vt1 (vector_insert_subvec (vt1 undef), (vt2 (load (add GPR64sp:$Xn, simm4s16:$…
1041 (load_instr_imm (ptrue 31), GPR64sp:$Xn, simm4s16:$imm)>;
1043 …def : Pat<(vt1 (op (vt1 (vector_insert_subvec (vt1 undef), (vt2 (load (AddrCP GPR64sp:$Xn, GPR64sp…
1044 (load_instr_scalar (ptrue 31), GPR64sp:$Xn, $idx)>;
/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghash-x86.pl840 ($Xn,$Xhn)=("xmm6","xmm7");
1023 &movdqu ($Xn,&QWP(16,$inp)); # Ii+1
1025 &pshufb ($Xn,$T3);
1029 &pshufd ($T1,$Xn,0b01001110); # H*Ii+1
1030 &movdqa ($Xhn,$Xn);
1031 &pxor ($T1,$Xn); #
1034 &pclmulqdq ($Xn,$Hkey,0x00); #######
1055 &xorps ($Xi,$Xn); # (H*Ii+1) + H^2*(Ii+Xi)
1060 &movdqu ($Xn,&QWP(16,$inp)); # Ii+1
1071 &pshufb ($Xn,$T3);
[all …]
/freebsd/crypto/openssl/crypto/modes/
H A Dgcm128.c999 memcpy(ctx->Xn, ctx->Xi.c, sizeof(ctx->Xi));
1025 ctx->Xn[mres++] = *(out++) = *(in++) ^ ctx->EKi.c[n];
1030 GHASH(ctx, ctx->Xn, mres);
1057 GHASH(ctx, ctx->Xn, mres);
1149 ctx->Xn[mres++] = out[n] = in[n] ^ ctx->EKi.c[n];
1180 ctx->Xn[mres++] = out[i] = in[i] ^ ctx->EKi.c[n];
1182 if (mres == sizeof(ctx->Xn)) {
1183 GHASH(ctx,ctx->Xn,sizeof(ctx->Xn));
1231 memcpy(ctx->Xn, ctx->Xi.c, sizeof(ctx->Xi));
1257 *(out++) = (ctx->Xn[mres++] = *(in++)) ^ ctx->EKi.c[n];
[all …]
/freebsd/contrib/netbsd-tests/lib/libcurses/check_files/
H A Dcopywin12.chk3 n t scup6;7Xn t s
H A Dcopywin8.chk3 n t scup6;7Xn t s
H A Dcopywin10.chk1 cup11;15Xt s i cup12;15Xg e t cup13;15Xn t s cup14;15X n t scup15;15Xt n t cup16;15X t n t
/freebsd/crypto/openssl/include/crypto/
H A Dmodes.h136 unsigned char Xn[48]; member
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5501 unsigned Xn = Inst.getOperand(1).getReg(); in validateInstruction() local
5502 if (Xt == Xn) in validateInstruction()
5613 unsigned Xn = Inst.getOperand(5).getReg(); in validateInstruction() local
5620 if (Xn_wb != Xn) in validateInstruction()
5626 if (Xd == Xn) in validateInstruction()
5629 if (Xs == Xn) in validateInstruction()
5661 unsigned Xn = Inst.getOperand(3).getReg(); in validateInstruction() local
5666 if (Xn_wb != Xn) in validateInstruction()
5669 if (Xd == Xn) in validateInstruction()
5675 if (Xn == Xm) in validateInstruction()
/freebsd/crypto/openssl/test/recipes/30-test_evp_data/
H A Devppkey_ecdh.txt1319 gxZ/Xn+u6nRfrUu6d84FxireKSjKGHI=
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td178 // bits<4> Xn : index register for address operand n