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Searched refs:XD (Results 1 – 25 of 27) sorted by relevance

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/freebsd/contrib/ncurses/progs/
H A Dtparm_type.c50 #define XD(code, onlyname) TD(code, onlyname, onlyname, onlyname) in tparm_type() macro
63 XD(Str, "Cs"), in tparm_type()
64 XD(Str_Str, "Ms"), in tparm_type()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.cpp211 else if (OpPrefix == X86Local::XD) in insnContext()
224 else if (OpPrefix == X86Local::XD) in insnContext()
246 else if (OpPrefix == X86Local::XD) in insnContext()
260 else if (OpPrefix == X86Local::XD) in insnContext()
274 else if (OpPrefix == X86Local::XD) in insnContext()
286 else if (OpPrefix == X86Local::XD) in insnContext()
302 else if (OpPrefix == X86Local::XD) in insnContext()
314 } else if (OpPrefix == X86Local::XD) in insnContext()
331 else if (OpPrefix == X86Local::XD) in insnContext()
347 else if (HasVEX_L && OpPrefix == X86Local::XD) in insnContext()
[all …]
H A DX86RecognizableInstr.h173 enum { PD = 1, XS = 2, XD = 3, PS = 4 }; enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrSNP.td26 TB, XD, Requires<[In64BitMode]>;
30 TB, XD, Requires<[Not64BitMode]>;
34 def RMPUPDATE: I<0x01, MRM_FE, (outs), (ins), "rmpupdate", []>, TB, XD,
H A DX86InstrRAOINT.td38 defm AOR : RaoInt<"or" >, T8, XD;
45 defm AOR : RaoInt<"or", "_EVEX">, EVEX, T_MAP4, XD;
H A DX86InstrCMovSetCC.td156 XD, ZU, NoCD8, Sched<[WriteSETCC]>;
159 XD, PL, Sched<[WriteSETCC]>;
163 XD, ZU, NoCD8, Sched<[WriteSETCCStore]>;
166 XD, PL, Sched<[WriteSETCCStore]>;
H A DX86InstrAMX.td34 T8, XD;
58 VEX, T8, XD;
104 VEX, VVVV, T8, XD;
206 []>, VEX, VVVV, T8, XD;
283 def TDPBHF8PS : AMX_FP8_BASE<0xfd, "tdpbhf8ps">, T_MAP5, XD;
434 []>, VEX, VVVV, T8,XD;
452 []>, VEX, VVVV, T8,XD;
525 "tileloaddrs\t{$src1, $dst|$dst, $src1}", []>, T8, XD;
656 defm TCVTROWPS2PHL : AMXAVX512_BASE<0x6d, 0x77, "tcvtrowps2phl", PD, XD>;
657 defm TCVTROWPS2BF16H : AMXAVX512_BASE<0x6d, 0x07, "tcvtrowps2bf16h", XD, XD>;
H A DX86InstrAVX10.td23 [HasAVX10_2], [HasAVX10_2_512]>, XD;
25 [HasAVX10_2], [HasAVX10_2_512]>, XD;
678 T_MAP5,XD, EVEX_CD8<64, CD8VT1>;
682 REX_W, T_MAP5,XD, EVEX_CD8<64, CD8VT1>;
694 T_MAP5,XD, EVEX_CD8<64, CD8VT1>;
698 T_MAP5,XD, REX_W, EVEX_CD8<64, CD8VT1>;
751 EVEX_CD8<16, CD8VF>, T8, XD;
755 EVEX_CD8<16, CD8VF>, T_MAP5, XD;
759 EVEX_CD8<16, CD8VF>, T_MAP5, XD;
763 EVEX_CD8<16, CD8VF>, T_MAP5, XD;
[all …]
H A DX86InstrUtils.td40 class XD { Prefix OpPrefix = XD; }
75 class AVX512XDIi8Base : TB, XD {
486 !if(!eq(OpPrefix.Value, XD.Value), [UseSSE2],
503 !if(!eq(OpPrefix.Value, XD.Value), [UseSSE2],
598 // SDI - SSE2 instructions with XD prefix.
599 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
604 // VSDI - SSE2 scalar instructions with XD prefix in AVX form.
609 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as
616 : I<o, F, outs, ins, asm, pattern>, TB, XD, Requires<[UseSSE2]>;
619 : Ii8<o, F, outs, ins, asm, pattern>, TB, XD, Requires<[UseSSE2]>;
[all …]
H A DX86InstrSystem.td75 []>, TB, XD, Requires<[In64BitMode]>;
227 []>, TB, XD, Requires<[In64BitMode]>;
229 []>, TB, XD, Requires<[In64BitMode]>;
456 def RDMSRLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, TB, XD;
464 [(set GR64:$dst, (int_x86_urdmsr GR64:$src))]>, XD, NoCD8;
468 T_MAP7, VEX, XD, NoCD8;
471 T_MAP7, VEX, XD, NoCD8;
H A DX86InstrSSE.td273 SSEPackedDouble, UseSSE2>, TB, XD;
279 SSEPackedDouble>, TB, XD;
914 TB, XD, VEX, VEX_LIG;
918 TB, XD, VEX, REX_W, VEX_LIG;
931 TB, XD, VEX, VEX_LIG;
935 TB, XD, VEX, REX_W, VEX_LIG;
950 WriteCvtI2SD, SSEPackedDouble>, TB, XD, VEX, VVVV,
953 WriteCvtI2SD, SSEPackedDouble>, TB, XD, VEX, VVVV,
992 WriteCvtSD2I, SSEPackedDouble>, TB, XD, SIMD_EXC;
995 WriteCvtSD2I, SSEPackedDouble>, TB, XD, REX_W, SIMD_EXC;
[all …]
H A DX86InstrFormats.td146 def XD : Prefix<3>;
148 // that other instructions with this opcode use PD/XS/XD
H A DX86InstrMisc.td1398 defm PDEP32 : PdepPext<"pdep", Xi32, X86pdep>, XD, VEX;
1399 defm PDEP64 : PdepPext<"pdep", Xi64, X86pdep>, XD, REX_W, VEX;
1405 defm PDEP32 : PdepPext<"pdep", Xi32, X86pdep, "_EVEX">, XD, EVEX;
1406 defm PDEP64 : PdepPext<"pdep", Xi64, X86pdep, "_EVEX">, XD, REX_W, EVEX;
1493 TB, XD, Requires<[HasWAITPKG]>;
1555 NoCD8, XD, AdSize32;
1559 NoCD8, XD, AdSize64;
1575 T8, XD, AdSize16, Requires<[HasENQCMD, Not64BitMode]>;
1643 [(int_x86_xsusldtrk)]>, TB, XD;
1645 [(int_x86_xresldtrk)]>, TB, XD;
H A DX86InstrAVX512.td2678 VEX, TB, XD;
2682 VEX, TB, XD, REX_W;
2688 EVEX, TB, XD;
2692 EVEX, TB, XD, REX_W;
3426 TB, XD, EVEX_CD8<8, CD8VF>;
3432 TB, XD, REX_W, EVEX_CD8<16, CD8VF>;
3972 VEX_LIG, TB, XD, REX_W, EVEX_CD8<64, CD8VT1>;
4345 []>, TB, XD, EVEX, VVVV, VEX_LIG, REX_W,
4354 []>, EVEX_K, TB, XD, EVEX, VVVV, VEX_LIG,
4362 []>, EVEX_KZ, TB, XD, EVEX, VVVV, VEX_LIG,
[all …]
H A DX86InstrArithmetic.td1423 (ins t.RegClass:$src), "mulx", mulx_args, []>, T8, XD, VEX,
1427 (ins t.MemOperand:$src), "mulx", mulx_args, []>, T8, XD, VEX,
1433 (ins t.RegClass:$src), "mulx", mulx_args, []>, T8, XD,
1438 (ins t.MemOperand:$src), "mulx", mulx_args, []>, T8, XD,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86IntelInstPrinter.cpp88 else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) in printVecCompareInstr()
207 } else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD && in printVecCompareInstr()
H A DX86ATTInstPrinter.cpp121 else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) in printVecCompareInstr()
233 } else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD && in printVecCompareInstr()
H A DX86BaseInfo.h725 XD = 3 << OpPrefixShift, enumerator
H A DX86MCCodeEmitter.cpp1060 case X86II::XD: in emitVEXOpcodePrefix()
1499 case X86II::XD: // F2 in emitOpcodePrefix()
/freebsd/contrib/sendmail/contrib/
H A Dmail.local.linux61 M"4P*'I..-H8F-0FD/[`*@ZSBM)K6Y%=CNCH1KWSTJT`)2\6&XD]QL';BD?FK
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedTSV110.td518 def : InstRW<[TSV110Wr_2cyc_1FSU1], (instregex "^FMOV(DX|WS|XD|SW|DXHigh|XDHigh)r$")>;
H A DAArch64SchedExynosM3.td563 def : InstRW<[M3WriteNEONI], (instregex "^FMOV(DX|XD)Highr")>;
H A DAArch64SchedFalkorDetails.td1149 def : InstRW<[FalkorWr_FMOV], (instregex "^FMOV(WS|XD|XDHigh)r$")>;
/freebsd/share/misc/
H A Dpci_vendors10016 0004 NM2160 [MagicGraph 128XD]
10017 1014 00ba MagicGraph 128XD
10018 1025 1007 MagicGraph 128XD
10019 1028 0074 MagicGraph 128XD
10020 1028 0075 MagicGraph 128XD
10021 1028 007d MagicGraph 128XD
10022 1028 007e MagicGraph 128XD
10023 1033 802f MagicGraph 128XD
10024 104d 801b MagicGraph 128XD
10025 104d 802f MagicGraph 128XD
[all …]
H A Dusb_vendors7322 0041 XD-0405-U [Intuos2 (4x5)]
7323 0042 XD-0608-U [Intuos2 (6x8)]
7324 0043 XD-0912-U [Intuos2 (9x12)]
7325 0044 XD-1212-U [Intuos2 (12x12)]
7326 0045 XD-1218-U [Intuos2 (12x18)]
13110 0002 XD-2 [Spike]
18666 1336 SDHC/MicroSD/MMC/MS/M2/CF/XD Flash Card Reader
19259 1105 SM-MS/Pro-MMC-XD Card Reader

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