| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
| H A D | aarch32.cpp | 224 : Wd{*reinterpret_cast<support::ulittle32_t *>(FixupPtr)} {} in WritableArmRelocation()
226 support::ulittle32_t &Wd; member
231 : Wd{*reinterpret_cast<const support::ulittle32_t *>(FixupPtr)} {} in ArmRelocation()
233 ArmRelocation(WritableArmRelocation &Writable) : Wd{Writable.Wd} {} in ArmRelocation()
235 const support::ulittle32_t &Wd; member
248 formatv("Invalid opcode {0:x8} for relocation: {1}", R.Wd.value(), in makeUnexpectedOpcodeError()
259 template <EdgeKind_aarch32 K> static bool checkOpcodeArm(uint32_t Wd) { in checkOpcodeArm() argument
260 return (Wd & FixupInfo<K>::OpcodeMask) == FixupInfo<K>::Opcode; in checkOpcodeArm()
320 if (!Info.checkOpcode(R.Wd)) in checkOpcode()
352 uint32_t Wd = R.Wd & FixupInfo<Kind>::RegMask; in checkRegister() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredNeoverse.td | 60 // MOV Wd, #0
66 // MOV Wd, WZR
68 // MOV Wd, Wn
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| H A D | AArch64SchedA510.td | 577 (instregex "^(SQINC|SQDEC|UQINC|UQDEC)[BHWD]_[XW]Pi(Wd)?I")>;
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| H A D | AArch64SchedA320.td | 599 (instregex "^(SQINC|SQDEC|UQINC|UQDEC)[BHWD]_[XW]Pi(Wd)?I")>;
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| H A D | AArch64InstrInfo.td | 3144 def : InstAlias<"mvn $Wd, $Wm", (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0), 3>;
3147 def : InstAlias<"mvn $Wd, $Wm$sh",
3148 (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh), 2>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 709 uint16_t Wd = im(2), Of = im(3); in evaluate() local
710 assert(Wd <= W0); in evaluate()
711 if (Wd == 0) in evaluate()
715 RegisterCell Pad = (Wd+Of > W0) ? rc(1).cat(eIMM(0, Wd+Of-W0)) : rc(1); in evaluate()
716 RegisterCell Ext = eXTR(Pad, Of, Wd+Of); in evaluate()
718 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1)); in evaluate()
720 return rr0(eZXT(RC, Wd), Outputs); in evaluate()
721 return rr0(eSXT(RC, Wd), Outputs); in evaluate()
725 uint16_t Wd = im(3), Of = im(4); in evaluate() local
726 assert(Wd < W0 && Of < W0); in evaluate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 3304 Register Wd = MI.getOperand(0).getReg(); in emitINSERT_FW() local
3316 BuildMI(*BB, MI, DL, TII->get(Mips::INSVE_W), Wd) in emitINSERT_FW()
3340 Register Wd = MI.getOperand(0).getReg(); in emitINSERT_FD() local
3350 BuildMI(*BB, MI, DL, TII->get(Mips::INSVE_D), Wd) in emitINSERT_FD()
3386 Register Wd = MI.getOperand(0).getReg(); in emitINSERT_DF_VIDX() local
3478 BuildMI(*BB, MI, DL, TII->get(Mips::SLD_B), Wd) in emitINSERT_DF_VIDX()
3500 Register Wd = MI.getOperand(0).getReg(); in emitFILL_FW() local
3514 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wd).addReg(Wt2).addImm(0); in emitFILL_FW()
3535 Register Wd = MI.getOperand(0).getReg(); in emitFILL_FD() local
3545 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_D), Wd).addReg(Wt2).addImm(0); in emitFILL_FD()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | aarch32.h | 183 bool (*checkOpcode)(uint32_t Wd) = nullptr;
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| /freebsd/contrib/netbsd-tests/usr.bin/netpgpverify/ |
| H A D | t_netpgpverify.sh | 650 Wd/uF+m5Z9S0da09xxgFH6U0lmHx+DphdmD7J4r5m9tx96g6JBmKmlSax3HZjgWr
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