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/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve.td32 def "": Intrinsic<Vector, (args Vector:$a, Vector:$b),
33 (bitcast (bitop (bitcast $a, UVector), (bitcast $b, UVector)), Vector)>;
37 def "": Intrinsic<Vector, (args Vector:$a, Vector:$b),
38 (bitcast (bitop (bitcast $a, UVector), (not (bitcast $b, UVector))), Vector)>;
42 def vqaddq: Intrinsic<Vector, (args Vector:$a, Vector:$b),
43 (IRIntBase<"sadd_sat", [Vector]> $a, $b)>;
44 def vqsubq: Intrinsic<Vector, (args Vector:$a, Vector:$b),
45 (IRIntBase<"ssub_sat", [Vector]> $a, $b)>;
47 def vqaddq_n: Intrinsic<Vector, (args Vector:$a, unpromoted<Scalar>:$b),
48 (IRIntBase<"sadd_sat", [Vector]> $a, (splat $b))>;
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H A Darm_cde.td123 def vcx1q : CDEIntrinsic<Vector, (args imm_coproc:$cp, imm_12b:$imm),
128 CDEIntrinsic<Vector, (args imm_coproc:$cp, Vector:$acc, imm_12b:$imm),
130 Vector)>;
133 CDEIntrinsic<Vector, (args imm_coproc:$cp, Vector:$n, imm_7b:$imm),
135 Vector)>;
137 CDEIntrinsic<v16u8, (args imm_coproc:$cp, Vector:$n, imm_7b:$imm),
141 CDEIntrinsic<Vector,
142 (args imm_coproc:$cp, Vector:$acc, v16u8:$n, imm_7b:$imm),
144 Vector)>;
147 CDEIntrinsic<Vector,
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H A Driscv_vector.td248 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy)
249 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, VL)
251 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy)
252 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, VL)
254 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, Mask, VL, Policy)
255 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, VL)
257 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, Mask, VL, Policy)
258 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, VL)
260 The Vector(s) is poison when the policy behavior allows us to not care
492 // 7. Vector Loads and Stores
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DBlotMapVector.h29 VectorTy Vector; variable
34 assert(Vector.size() >= Map.size()); // May differ due to blotting. in ~BlotMapVector()
37 assert(I->second < Vector.size()); in ~BlotMapVector()
38 assert(Vector[I->second].first == I->first); in ~BlotMapVector()
40 for (typename VectorTy::const_iterator I = Vector.begin(), E = Vector.end(); in ~BlotMapVector()
43 Map[I->first] == size_t(I - Vector.begin()))); in ~BlotMapVector()
50 iterator begin() { return Vector.begin(); } in begin()
51 iterator end() { return Vector.end(); } in end()
52 const_iterator begin() const { return Vector.begin(); } in begin()
53 const_iterator end() const { return Vector.end(); } in end()
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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DMapVector.h38 VectorType Vector; variable
57 return std::move(Vector); in takeVector()
61 ArrayRef<value_type> getArrayRef() const { return Vector; } in getArrayRef()
63 size_type size() const { return Vector.size(); } in size()
69 Vector.reserve(NumEntries); in reserve()
72 iterator begin() { return Vector.begin(); } in begin()
73 const_iterator begin() const { return Vector.begin(); } in begin()
74 iterator end() { return Vector.end(); } in end()
75 const_iterator end() const { return Vector.end(); } in end()
77 reverse_iterator rbegin() { return Vector.rbegin(); } in rbegin()
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H A DUniqueVector.h35 VectorType Vector; variable
48 Val = static_cast<unsigned>(Vector.size()) + 1; in insert()
51 Vector.push_back(Entry); in insert()
71 return Vector[ID - 1];
75 iterator begin() { return Vector.begin(); } in begin()
78 const_iterator begin() const { return Vector.begin(); } in begin()
81 iterator end() { return Vector.end(); } in end()
84 const_iterator end() const { return Vector.end(); } in end()
87 size_t size() const { return Vector.size(); } in size()
90 bool empty() const { return Vector.empty(); } in empty()
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H A DSmallSet.h138 SmallVector<T, N> Vector; variable
169 [[nodiscard]] bool empty() const { return Vector.empty() && Set.empty(); } in empty()
172 return isSmall() ? Vector.size() : Set.size(); in size()
202 if (I != Vector.end()) { in erase()
203 Vector.erase(I); in erase()
210 Vector.clear(); in clear()
216 return {Vector.begin()}; in begin()
222 return {Vector.end()}; in end()
229 return vfind(V) != Vector.end(); in contains()
246 if (I != Vector.end()) // Don't reinsert if it already exists. in insertImpl()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td10 /// support code generation for the standard 'V' (Vector) extension, version
132 vti.Vector, vti.Vector, vti.Log2SEW,
135 vti.Vector, vti.Vector, vti.Log2SEW,
148 vti.Vector, vti.Vector, vti.Log2SEW,
207 vti.Vector, vti.Vector, vti.Log2SEW,
210 vti.Vector, vti.Vector, vti.Scalar,
222 vti.Vector, vti.Vector, vti.Log2SEW,
225 vti.Vector, vti.Vector, vti.Scalar,
236 def : Pat<(fvti.Vector (vop (fvti.Vector (SplatFPOp fvti.Scalar:$rs2)),
237 (fvti.Vector fvti.RegClass:$rs1))),
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H A DRISCVScheduleV.td280 // 3.6 Vector Byte Length vlenb
288 // 7. Vector Loads and Stores
289 // 7.4. Vector Unit-Stride Instructions
292 // 7.4.1. Vector Unit-Strided Mask
295 // 7.5. Vector Strided Instructions
304 // 7.6. Vector Indexed Instructions
321 // 7.7. Vector Unit-stride Fault-Only-First Loads
323 // 7.8. Vector Segment Instructions
337 // 7.9. Vector Whole Register Instructions
347 // 11. Vector Integer Arithmetic Instructions
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H A DRISCVInstrInfoVVLPatterns.td10 /// support code generation for the standard 'V' (Vector) extension, version
139 // Vector binary ops with a passthru as a third operand, a mask as a fourth
189 // Vector unary ops with a mask as a second operand and VL as a third operand.
247 // Vector FMA ops with a mask as a fourth operand and VL as a fifth operand.
265 // Vector widening FMA ops with a mask as a fourth operand and VL as a fifth
412 // Vector compare producing a mask. Fourth operand is input mask. Fifth
521 // Vector sign/zero extend with additional mask & VL operands.
948 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
952 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
965 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
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H A DRISCVInstrInfoZvk.td10 // Vector Cryptography Instructions extension, version Release 1.0.0.
593 def : Pat<(vti.Vector (op (vti.Vector vti.RegClass:$rs1))),
595 (vti.Vector (IMPLICIT_DEF)),
614 def : Pat<(vti.Vector (and (xor vti.RegClass:$rs1,
618 (vti.Vector (IMPLICIT_DEF)),
622 def : Pat<(vti.Vector (and (riscv_splat_vector
626 (vti.Vector (IMPLICIT_DEF)),
630 def : Pat<(vti.Vector (and (riscv_splat_vector invLogicImm:$rs1),
633 (vti.Vector (IMPLICIT_DEF)),
671 def : Pat<(vti.Vector (rotl vti.RegClass:$rs2,
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H A DRISCVInstrInfoVPseudos.td10 /// for the standard 'V' (Vector) extension, version 1.0.
282 // Vector register and vector group type information.
287 ValueType Vector = Vec;
4573 vti.Vector, vti.Vector, vti.Mask,
4589 def : VPatUnaryNoMask<intrinsic, instruction, "M", vti.Vector, vti.Mask,
4591 def : VPatUnaryMask<intrinsic, instruction, "M", vti.Vector, vti.Mask,
4605 vti.Vector, fti.Vector,
4608 vti.Vector, fti.Vector, vti.Mask,
4619 vti.Vector, vti.Vector, vti.Log2SEW,
4622 vti.Vector, vti.Vector, vti.Mask, vti.Log2SEW,
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H A DRISCVFeatures.td627 // Vector Extensions
630 "Minimum Vector Length 32", [],
636 RISCVExtension<1, 0, "Minimum Vector Length "#I,
643 "Vector Extensions for Embedded Processors "
651 "Vector Extensions for Embedded Processors "
658 "Vector Extensions for Embedded Processors "
665 "Vector Extensions for Embedded Processors "
672 "Vector Extensions for Embedded Processors "
679 "Vector Extension for Application Processors",
684 : RISCVExtension<1, 0, "Vector BF16 Converts", [FeatureStdExtZve32f]>;
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/PBQP/
H A DMath.h27 class Vector {
30 explicit Vector(unsigned Length) : Data(Length) {} in Vector() function
33 Vector(unsigned Length, PBQPNum InitVal) : Data(Length) { in Vector() function
38 Vector(const Vector &V) : Data(ArrayRef<PBQPNum>(V.Data)) {} in Vector() function
41 Vector(Vector &&V) : Data(std::move(V.Data)) {} in Vector() function
50 bool operator==(const Vector &V) const {
76 Vector& operator+=(const Vector &V) {
94 inline hash_code hash_value(const Vector &V) { in hash_value()
103 OStream& operator<<(OStream &OS, const Vector &V) {
176 Vector getRowAsVector(unsigned R) const { in getRowAsVector()
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/freebsd/contrib/llvm-project/compiler-rt/lib/scudo/standalone/
H A Dvector.h123 class Vector : public VectorNoCtor<T, StaticNumEntries> {
127 constexpr Vector() { VectorNoCtor<T, StaticNumEntries>::init(); } in Vector() function
128 explicit Vector(uptr Count) { in Vector() function
132 ~Vector() { VectorNoCtor<T, StaticNumEntries>::destroy(); } in ~Vector()
134 Vector(const Vector &) = delete;
135 Vector &operator=(const Vector &) = delete;
136 Vector(Vector &&) = delete;
137 Vector &operator=(Vector &&) = delete;
/freebsd/contrib/bmake/
H A Dlst.h169 typedef struct Vector {
174 } Vector;
176 void Vector_Init(Vector *, size_t);
183 Vector_Get(Vector *v, size_t i)
189 void *Vector_Push(Vector *); in Vector_Get()
190 void *Vector_Pop(Vector *); in Vector_Get()
193 Vector_Done(Vector *v)
172 typedef struct Vector { global() struct
177 } Vector; global() typedef
/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_report.h58 Vector<ReportMopMutex> mset;
105 Vector<ReportStack*> stacks;
106 Vector<ReportMop*> mops;
107 Vector<ReportLocation*> locs;
108 Vector<ReportMutex*> mutexes;
109 Vector<ReportThread*> threads;
110 Vector<Tid> unique_tids;
/freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_vector.h24 class Vector {
26 Vector() : begin_(), end_(), last_() {} in Vector() function
28 ~Vector() { in ~Vector()
119 Vector(const Vector&);
120 void operator=(const Vector&);
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Schedule.td337 // Vector integer operations.
361 defm WriteVecALU : X86SchedWritePair<ReadAfterVecLd>; // Vector integer ALU op, no logicals.
362 defm WriteVecALUX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer ALU op, no logicals (XMM).
363 defm WriteVecALUY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer ALU op, no logicals (YMM).
364 defm WriteVecALUZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer ALU op, no logicals (ZMM).
365 defm WriteVecLogic : X86SchedWritePair<ReadAfterVecLd>; // Vector integer and/or/xor logicals.
366 defm WriteVecLogicX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer and/or/xor logicals (XMM).
367 defm WriteVecLogicY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer and/or/xor logicals (YMM).
368 defm WriteVecLogicZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer and/or/xor logicals (ZMM).
369 defm WriteVecTest : X86SchedWritePair<ReadAfterVecXLd>; // Vector intege
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrVec.td2 // Vector Instructions
93 // Guide here. As those mnemonics, we use mnemonics defined in Vector Engine
124 // Section 8.9 - Vector Load/Store and Move Instructions
161 // Section 8.9.1 - VLD (Vector Load)
164 // Section 8.9.2 - VLDU (Vector Load Upper)
167 // Section 8.9.3 - VLDL (Vector Load Lower)
171 // Section 8.9.4 - VLD2D (Vector Load 2D)
174 // Section 8.9.5 - VLDU2D (Vector Load Upper 2D)
177 // Section 8.9.6 - VLDL2D (Vector Load Lower 2D)
214 // Section 8.9.7 - VST (Vector Store)
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsRISCVXAndes.td14 // Andes Vector BFloat16 Conversion Extension
18 // Andes Vector INT4 Load Extension
22 // Andes Vector Packed FP16 Extension
26 // Andes Vector Dot Product Extension
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt6 - Vector Compare Not Equal (Zero):
11 - Vector Extract Unsigned: vextractub vextractuh vextractuw vextractd
19 - Vector Extract Unsigned Byte Left/Right-Indexed:
32 - Vector Insert Element Instructions: vinsertb vinsertd vinserth vinsertw
38 - Vector Count Leading/Trailing Zero LSB. Result is placed into GPR[rD]:
44 - Vector Count Trailing Zeros: vctzb vctzh vctzw vctzd
51 - Vector Extend Sign: vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d
92 - Vector Integer Negate: vnegw vnegd
97 - Vector Parity Byte: vprtybw vprtybd vprtybq
103 - Vector (Bit) Permute (Right-indexed):
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/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_riscvcap.pod27 Vector extension.
123 Vector Extension for Application Processors
129 Vector Basic Bit-manipulation
135 Vector Carryless Multiplication
141 Vector Cryptography Bit-manipulation
147 Vector GCM/GMAC
153 NIST Suite: Vector AES Block Cipher
159 NIST Suite: Vector SHA-2 Secure Hash
165 NIST Suite: Vector SHA-2 Secure Hash
/freebsd/crypto/openssl/test/recipes/30-test_evp_data/
H A Devppkey_ecx_sigalg.txt355 # Test Vector 1
369 # Test Vector 2
383 # Test Vector 3
397 # Test Vector 4
411 # Test Vector 5
425 # Test Vector 6
439 # Test Vector 7
453 # Test Vector 8
467 # Test Vector 9
481 # Test Vector 10
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperVectorOps.cpp38 Register Vector = Extract->getVectorReg(); in matchExtractVectorElement() local
41 LLT VectorTy = MRI.getType(Vector); in matchExtractVectorElement()
123 Register Vector = Extract->getVectorReg(); in matchExtractVectorElementWithDifferentIndices() local
126 getOpcodeDef<GInsertVectorElement>(Vector, MRI); in matchExtractVectorElementWithDifferentIndices()
165 Register Vector = Extract->getVectorReg(); in matchExtractVectorElementWithBuildVector() local
166 LLT VectorTy = MRI.getType(Vector); in matchExtractVectorElementWithBuildVector()
213 Register Vector = Extract->getVectorReg(); in matchExtractVectorElementWithBuildVectorTrunc() local
216 GBuildVectorTrunc *Build = getOpcodeDef<GBuildVectorTrunc>(Vector, MRI); in matchExtractVectorElementWithBuildVectorTrunc()
220 LLT VectorTy = MRI.getType(Vector); in matchExtractVectorElementWithBuildVectorTrunc()

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