Lines Matching refs:Vector
10 // Vector Cryptography Instructions extension, version Release 1.0.0.
576 def : Pat<(vti.Vector (op (vti.Vector vti.RegClass:$rs1))),
578 (vti.Vector (IMPLICIT_DEF)),
595 def : Pat<(vti.Vector (and (riscv_vnot vti.RegClass:$rs1),
598 (vti.Vector (IMPLICIT_DEF)),
602 def : Pat<(vti.Vector (and (riscv_splat_vector
606 (vti.Vector (IMPLICIT_DEF)),
644 def : Pat<(vti.Vector (rotl vti.RegClass:$rs2,
645 (vti.Vector (SplatPat_uimm6 uimm6:$rs1)))),
647 (vti.Vector (IMPLICIT_DEF)),
661 def : Pat<(shl (wti.Vector (zext_oneuse (vti.Vector vti.RegClass:$rs2))),
662 (wti.Vector (ext_oneuse (vti.Vector vti.RegClass:$rs1)))),
664 (wti.Vector (IMPLICIT_DEF)),
668 def : Pat<(shl (wti.Vector (zext_oneuse (vti.Vector vti.RegClass:$rs2))),
669 (wti.Vector (Low8BitsSplatPat (XLenVT GPR:$rs1)))),
671 (wti.Vector (IMPLICIT_DEF)),
675 def : Pat<(shl (wti.Vector (zext_oneuse (vti.Vector vti.RegClass:$rs2))),
676 (wti.Vector (SplatPat_uimm5 uimm5:$rs1))),
678 (wti.Vector (IMPLICIT_DEF)),
693 def : Pat<(vti.Vector (op (vti.Vector vti.RegClass:$rs1),
694 (vti.Vector vti.RegClass:$merge),
711 def : Pat<(vti.Vector (riscv_and_vl (riscv_xor_vl
712 (vti.Vector vti.RegClass:$rs1),
714 (vti.Vector vti.RegClass:$merge),
717 (vti.Vector vti.RegClass:$rs2),
718 (vti.Vector vti.RegClass:$merge),
730 def : Pat<(vti.Vector (riscv_and_vl (riscv_splat_vector
732 (vti.Vector vti.RegClass:$rs2),
733 (vti.Vector vti.RegClass:$merge),
760 (vti.Vector (SplatPat_uimm6 uimm6:$rs1)),
761 (vti.Vector vti.RegClass:$merge),
779 (wti.Vector (zext_oneuse (vti.Vector vti.RegClass:$rs2))),
780 (wti.Vector (ext_oneuse (vti.Vector vti.RegClass:$rs1))),
781 (wti.Vector wti.RegClass:$merge),
788 (wti.Vector (riscv_zext_vl_oneuse
789 (vti.Vector vti.RegClass:$rs2),
791 (wti.Vector (riscv_ext_vl_oneuse
792 (vti.Vector vti.RegClass:$rs1),
794 (wti.Vector wti.RegClass:$merge),
801 (wti.Vector (zext_oneuse (vti.Vector vti.RegClass:$rs2))),
802 (wti.Vector (Low8BitsSplatPat (XLenVT GPR:$rs1))),
803 (wti.Vector wti.RegClass:$merge),
810 (wti.Vector (riscv_zext_vl_oneuse
811 (vti.Vector vti.RegClass:$rs2),
813 (wti.Vector (Low8BitsSplatPat (XLenVT GPR:$rs1))),
814 (wti.Vector wti.RegClass:$merge),
821 (wti.Vector (zext_oneuse (vti.Vector vti.RegClass:$rs2))),
822 (wti.Vector (SplatPat_uimm5 uimm5:$rs1)),
823 (wti.Vector wti.RegClass:$merge),
830 (wti.Vector (riscv_zext_vl_oneuse
831 (vti.Vector vti.RegClass:$rs2),
833 (wti.Vector (SplatPat_uimm5 uimm5:$rs1)),
834 (wti.Vector wti.RegClass:$merge),
841 (vti.Vector vti.RegClass:$rs2),
842 (vti.Vector vti.RegClass:$rs1),
843 (wti.Vector wti.RegClass:$merge),
850 (vti.Vector vti.RegClass:$rs2),
851 (vti.Vector (Low8BitsSplatPat (XLenVT GPR:$rs1))),
852 (wti.Vector wti.RegClass:$merge),
859 (vti.Vector vti.RegClass:$rs2),
860 (vti.Vector (SplatPat_uimm5 uimm5:$rs1)),
861 (wti.Vector wti.RegClass:$merge),
914 vti.Vector, vti.Vector, vti.Log2SEW,
923 vti.Vector, vti_vs2.Vector, vti.Log2SEW,
937 vti.Vector, vti.Vector, vti.Vector,
947 vti.Vector, vti.Vector, XLenVT,
957 vti.Vector, vti.Vector, XLenVT, vti.Log2SEW,
965 vti.Vector, vti.Vector, vti.Vector, vti.Log2SEW,
978 vti.Vector, vti.Vector, XLenVT, vti.Mask,
992 def : Pat<(vti.Vector (Intr (vti.Vector vti.RegClass:$merge),
993 (vti.Vector vti.RegClass:$rs2),
996 (Pseudo (vti.Vector vti.RegClass:$merge),
997 (vti.Vector vti.RegClass:$rs2),
1006 def : Pat<(vti.Vector (IntrMask (vti.Vector vti.RegClass:$merge),
1007 (vti.Vector vti.RegClass:$rs2),
1011 (PseudoMask (vti.Vector vti.RegClass:$merge),
1012 (vti.Vector vti.RegClass:$rs2),
1041 Wti.Vector, Vti.Vector, XLenVT, Vti.Mask,
1045 Wti.Vector, Vti.Vector, XLenVT, Vti.Mask,