Home
last modified time | relevance | path

Searched refs:SrcSize (Results 1 – 25 of 37) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp193 unsigned SrcSize = TRI->getRegSizeInBits(Src, *MRI); in buildAnyextOrCopy() local
196 if (DstSize < SrcSize) { in buildAnyextOrCopy()
202 if (DstSize > SrcSize) { in buildAnyextOrCopy()
585 unsigned SrcSize = TRI->getRegSizeInBits(SrcReg, *MRI); in lowerInlineAsm() local
587 if (ResTy.isScalar() && ResTy.getSizeInBits() < SrcSize) { in lowerInlineAsm()
591 MRI->createGenericVirtualRegister(LLT::scalar(SrcSize)); in lowerInlineAsm()
595 } else if (ResTy.getSizeInBits() == SrcSize) { in lowerInlineAsm()
H A DCallLowering.cpp426 unsigned SrcSize = PartLLT.getSizeInBits().getFixedValue() * Regs.size(); in buildCopyFromRegs() local
427 if (SrcSize == OrigTy.getSizeInBits()) in buildCopyFromRegs()
430 auto Widened = B.buildMergeLikeInstr(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs()
621 const unsigned SrcSize = SrcTy.getSizeInBits(); in buildCopyToRegs() local
626 if (!LCMTy.isVector() && CoveringSize != SrcSize) { in buildCopyToRegs()
629 CoveringSize = alignTo(SrcSize, DstSize); in buildCopyToRegs()
637 for (unsigned Size = SrcSize; Size != CoveringSize; Size += SrcSize) in buildCopyToRegs()
643 if (LCMTy.isVector() && CoveringSize != SrcSize) in buildCopyToRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp218 unsigned SrcSize = MRI.getType(SrcReg).getSizeInBits(); in matchUCharToFloat() local
219 assert(SrcSize == 16 || SrcSize == 32 || SrcSize == 64); in matchUCharToFloat()
220 const APInt Mask = APInt::getHighBitsSet(SrcSize, SrcSize - 8); in matchUCharToFloat()
H A DAMDGPURegisterBankInfo.cpp4092 unsigned SrcSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping() local
4095 OpdsMapping[1] = AMDGPU::getValueMapping(BankID, SrcSize); in getInstrMapping()
4103 unsigned SrcSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping() local
4105 OpdsMapping[1] = AMDGPU::getValueMapping(BankID, SrcSize); in getInstrMapping()
4114 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping() local
4120 OpdsMapping[1] = AMDGPU::getValueMapping(Src0BankID, SrcSize); in getInstrMapping()
4121 OpdsMapping[2] = AMDGPU::getValueMapping(Src1BankID, SrcSize); in getInstrMapping()
4131 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping() local
4136 OpdsMapping[i] = AMDGPU::getValueMapping(Bank, SrcSize); in getInstrMapping()
4176 unsigned SrcSize = getSizeInBits(Src, MRI, *TRI); in getInstrMapping() local
[all …]
H A DAMDGPUInstructionSelector.cpp499 const unsigned SrcSize = SrcTy.getSizeInBits(); in selectG_EXTRACT() local
519 TRI.getRegClassForSizeOnBank(SrcSize, *SrcBank); in selectG_EXTRACT()
544 const unsigned SrcSize = SrcTy.getSizeInBits(); in selectG_MERGE_VALUES() local
545 if (SrcSize < 32) in selectG_MERGE_VALUES()
556 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(DstRC, SrcSize / 8); in selectG_MERGE_VALUES()
589 const unsigned SrcSize = SrcTy.getSizeInBits(); in selectG_UNMERGE_VALUES() local
594 TRI.getRegClassForSizeOnBank(SrcSize, *SrcBank); in selectG_UNMERGE_VALUES()
629 const unsigned SrcSize = SrcTy.getSizeInBits(); in selectG_BUILD_VECTOR() local
632 if (MI.getOpcode() == AMDGPU::G_BUILD_VECTOR && SrcSize >= 32) { in selectG_BUILD_VECTOR()
2215 unsigned SrcSize = SrcTy.getSizeInBits(); in selectG_TRUNC() local
[all …]
H A DSIFixSGPRCopies.cpp1065 size_t SrcSize = TRI->getRegSizeInBits(*SrcRC); in lowerVGPR2SGPRCopies() local
1066 if (SrcSize == 16) { in lowerVGPR2SGPRCopies()
1071 } else if (SrcSize == 32) { in lowerVGPR2SGPRCopies()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h624 unsigned SrcSize = MRI.getType(Src1Reg).getSizeInBits(); in findValueFromConcat() local
627 unsigned StartSrcIdx = (StartBit / SrcSize) + 1; in findValueFromConcat()
629 unsigned InRegOffset = StartBit % SrcSize; in findValueFromConcat()
633 if (InRegOffset + Size > SrcSize) in findValueFromConcat()
637 if (InRegOffset == 0 && Size == SrcSize) { in findValueFromConcat()
656 unsigned SrcSize = MRI.getType(Src1Reg).getSizeInBits(); in findValueFromBuildVector() local
659 unsigned StartSrcIdx = (StartBit / SrcSize) + 1; in findValueFromBuildVector()
661 unsigned InRegOffset = StartBit % SrcSize; in findValueFromBuildVector()
665 if (Size < SrcSize) in findValueFromBuildVector()
670 if (Size > SrcSize) { in findValueFromBuildVector()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DMemCpyOptimizer.cpp1303 Value *SrcSize = MemCpy->getLength(); in processMemSetMemCpyDependence() local
1304 if (!isKnownNonZero(SrcSize, in processMemSetMemCpyDependence()
1330 if (DestSize == SrcSize) { in processMemSetMemCpyDependence()
1342 if (auto *SrcSizeC = dyn_cast<ConstantInt>(SrcSize)) in processMemSetMemCpyDependence()
1357 if (DestSize->getType() != SrcSize->getType()) { in processMemSetMemCpyDependence()
1359 SrcSize->getType()->getIntegerBitWidth()) in processMemSetMemCpyDependence()
1360 SrcSize = Builder.CreateZExt(SrcSize, DestSize->getType()); in processMemSetMemCpyDependence()
1362 DestSize = Builder.CreateZExt(DestSize, SrcSize->getType()); in processMemSetMemCpyDependence()
1365 Value *Ule = Builder.CreateICmpULE(DestSize, SrcSize); in processMemSetMemCpyDependence()
1366 Value *SizeDiff = Builder.CreateSub(DestSize, SrcSize); in processMemSetMemCpyDependence()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def253 unsigned SrcSize) {
267 if (SrcSize == 16) {
274 if (SrcSize == 32) {
278 assert((SrcSize == 64 || DstSize == 128) && "Unexpected vector extension");
/freebsd/contrib/llvm-project/llvm/lib/Linker/
H A DLinkModules.cpp196 uint64_t SrcSize = SrcDL.getTypeAllocSize(SrcGV->getValueType()); in computeResultingSelectionKind() local
203 From = SrcSize > DstSize ? LinkFrom::Src : LinkFrom::Dst; in computeResultingSelectionKind()
205 if (SrcSize != DstSize) in computeResultingSelectionKind()
296 uint64_t SrcSize = DL.getTypeAllocSize(Src.getValueType()); in shouldLinkFromSource() local
297 LinkFromSrc = SrcSize > DestSize; in shouldLinkFromSource()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeLayout.cpp153 double extTSPScore(uint64_t SrcAddr, uint64_t SrcSize, uint64_t DstAddr,
156 if (SrcAddr + SrcSize == DstAddr) {
162 if (SrcAddr + SrcSize < DstAddr) { in MergeGainT()
163 const uint64_t Dist = DstAddr - (SrcAddr + SrcSize); in MergeGainT()
169 const uint64_t Dist = SrcAddr + SrcSize - DstAddr; in mergeType()
132 extTSPScore(uint64_t SrcAddr,uint64_t SrcSize,uint64_t DstAddr,uint64_t Count,bool IsConditional) extTSPScore() argument
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1391 unsigned SrcSize = SrcTy.getScalarSizeInBits(); in verifyPreISelGenericInstruction() local
1394 if (DstSize <= SrcSize) in verifyPreISelGenericInstruction()
1399 if (DstSize >= SrcSize) in verifyPreISelGenericInstruction()
1591 unsigned SrcSize = MRI->getType(SrcOp.getReg()).getSizeInBits(); in verifyPreISelGenericInstruction() local
1592 if (SrcSize == DstSize) in verifyPreISelGenericInstruction()
1595 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction()
1613 unsigned SrcSize = MRI->getType(SrcOp.getReg()).getSizeInBits(); in verifyPreISelGenericInstruction() local
1615 if (DstSize <= SrcSize) in verifyPreISelGenericInstruction()
1618 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
2249 TypeSize SrcSize = TRI->getRegSizeInBits(SrcReg, *MRI); in visitMachineInstrBefore() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.h98 getFPExtMapping(unsigned DstSize, unsigned SrcSize);
H A DAArch64RegisterBankInfo.cpp190 #define CHECK_VALUEMAP_FPEXT(DstSize, SrcSize) \ in AArch64RegisterBankInfo() argument
193 unsigned PartialMapSrcIdx = PMI_FPR##SrcSize - PMI_Min; \ in AArch64RegisterBankInfo()
196 const ValueMapping *Map = getFPExtMapping(DstSize, SrcSize); \ in AArch64RegisterBankInfo()
204 Map[1].NumBreakDowns == 1 && "FPR" #SrcSize \ in AArch64RegisterBankInfo()
H A DAArch64InstructionSelector.cpp957 TypeSize SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); in getRegClassesForCopy() local
967 if (SrcRegBank != DstRegBank && (DstSize == 1 && SrcSize == 1)) in getRegClassesForCopy()
968 SrcSize = DstSize = TypeSize::getFixed(32); in getRegClassesForCopy()
970 return {getMinClassForRegBank(SrcRegBank, SrcSize, true), in getRegClassesForCopy()
1033 const TypeSize SrcSize = TRI.getRegSizeInBits(*SrcRC); in selectCopy() local
1041 getMinClassForRegBank(DstRegBank, SrcSize, /* GetAllRegSet */ true); in selectCopy()
1047 } else if (SrcSize > DstSize) { in selectCopy()
1054 } else if (DstSize > SrcSize) { in selectCopy()
1102 const unsigned SrcSize = SrcTy.getSizeInBits(); in selectFPConvOpc() local
1106 switch (SrcSize) { in selectFPConvOpc()
[all …]
H A DAArch64LegalizerInfo.cpp594 unsigned SrcSize = SrcTy.getSizeInBits(); in AArch64LegalizerInfo() local
595 if (SrcSize < 8 || !isPowerOf2_32(SrcSize)) in AArch64LegalizerInfo()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGCall.cpp1232 uint64_t SrcSize = DL.getTypeSizeInBits(Val->getType()); in CoerceIntOrPtrToIntOrPtr() local
1235 if (SrcSize > DstSize) { in CoerceIntOrPtrToIntOrPtr()
1236 Val = CGF.Builder.CreateLShr(Val, SrcSize - DstSize, "coerce.highbits"); in CoerceIntOrPtrToIntOrPtr()
1240 Val = CGF.Builder.CreateShl(Val, DstSize - SrcSize, "coerce.highbits"); in CoerceIntOrPtrToIntOrPtr()
1278 llvm::TypeSize SrcSize = CGF.CGM.getDataLayout().getTypeAllocSize(SrcTy); in CreateCoercedLoad() local
1289 if (!SrcSize.isScalable() && !DstSize.isScalable() && in CreateCoercedLoad()
1290 SrcSize.getFixedValue() >= DstSize.getFixedValue()) { in CreateCoercedLoad()
1334 llvm::ConstantInt::get(CGF.IntPtrTy, SrcSize.getKnownMinValue())); in CreateCoercedLoad()
1345 llvm::TypeSize SrcSize = CGM.getDataLayout().getTypeAllocSize(SrcTy); in CreateCoercedStore() local
1353 assert(!SrcSize.isScalable()); in CreateCoercedStore()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp284 const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); in selectCopy() local
290 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
316 assert((DstSize == SrcSize || in selectCopy()
327 DstRegBank.getID() == X86::GPRRegBankID && SrcSize > DstSize && in selectCopy()
1451 unsigned SrcSize = SrcTy.getSizeInBits(); in selectMergeValues() local
1469 .addImm((Idx - 1) * SrcSize); in selectMergeValues()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp1202 unsigned SrcSize = A->getType()->getScalarSizeInBits(); in visitZExt() local
1209 if (SrcSize < DstSize) { in visitZExt()
1210 APInt AndValue(APInt::getLowBitsSet(SrcSize, MidSize)); in visitZExt()
1216 if (SrcSize == DstSize) { in visitZExt()
1217 APInt AndValue(APInt::getLowBitsSet(SrcSize, MidSize)); in visitZExt()
1221 if (SrcSize > DstSize) { in visitZExt()
1671 int SrcSize = (int)SrcTy->getScalarSizeInBits() - IsSigned; in isKnownExactCastIntToFP() local
1676 if (SrcSize <= DestNumSigBits) in isKnownExactCastIntToFP()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp881 unsigned SrcSize = SrcTy.getSizeInBits(); in select() local
882 switch (SrcSize) { in select()
910 unsigned NewOpc = selectSimpleExtOpc(I.getOpcode(), SrcSize); in select()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h613 unsigned SrcSize = Src->getScalarSizeInBits(); in getCastInstrCost() local
614 if (DL.isLegalInteger(SrcSize) && in getCastInstrCost()
615 SrcSize <= DL.getPointerTypeSizeInBits(Dst)) in getCastInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DMemorySanitizer.cpp5185 Value *SrcSize = IRB.CreateBinaryIntrinsic( in finalizeInstrumentation() local
5189 kShadowTLSAlignment, SrcSize); in finalizeInstrumentation()
5194 MS.VAArgOriginTLS, kShadowTLSAlignment, SrcSize); in finalizeInstrumentation()
5300 Value *SrcSize = IRB.CreateBinaryIntrinsic( in finalizeInstrumentation() local
5304 kShadowTLSAlignment, SrcSize); in finalizeInstrumentation()
5471 Value *SrcSize = IRB.CreateBinaryIntrinsic( in finalizeInstrumentation() local
5475 kShadowTLSAlignment, SrcSize); in finalizeInstrumentation()
5684 Value *SrcSize = IRB.CreateBinaryIntrinsic( in finalizeInstrumentation() local
5688 kShadowTLSAlignment, SrcSize); in finalizeInstrumentation()
5974 Value *SrcSize = IRB.CreateBinaryIntrinsic( in finalizeInstrumentation() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DInstructions.cpp2890 unsigned SrcSize = SrcTy->getScalarSizeInBits(); in isEliminableCastPair() local
2894 if (SrcSize < DstSize) in isEliminableCastPair()
2896 if (SrcSize > DstSize) in isEliminableCastPair()
2908 unsigned SrcSize = SrcTy->getScalarSizeInBits(); in isEliminableCastPair() local
2910 if (SrcSize <= PtrSize && SrcSize == DstSize) in isEliminableCastPair()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1066 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1083 SrcSize == DstSize)
1139 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {

12