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Searched refs:SignMask (Results 1 – 25 of 25) sorted by relevance

/freebsd/contrib/arm-optimized-routines/math/aarch64/experimental/
H A Datan2_2u5.c18 #define SignMask (0x8000000000000000) macro
45 uint64_t sign_x = ix & SignMask; in atan2()
46 uint64_t sign_y = iy & SignMask; in atan2()
48 uint64_t iax = ix & ~SignMask; in atan2()
49 uint64_t iay = iy & ~SignMask; in atan2()
H A Datan2f_3u.c18 #define SignMask (0x80000000) macro
50 uint32_t sign_x = ix & SignMask; in atan2f()
51 uint32_t sign_y = iy & SignMask; in atan2f()
53 uint32_t iax = ix & ~SignMask; in atan2f()
54 uint32_t iay = iy & ~SignMask; in atan2f()
H A Derfcf_1u7.c20 #define SignMask 0x7fffffff macro
44 uint32_t ia = ix & SignMask; in erfcf()
45 uint32_t sign = ix & ~SignMask; in erfcf()
H A Dcbrtf_1u5.c14 #define SignMask 0x80000000 macro
30 uint32_t sign = ix & SignMask; in cbrtf()
H A Dlog1pf_2u1.c14 #define SignMask (0x80000000) macro
76 uint32_t ia = ix & ~SignMask; in log1pf()
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Datanf.c27 #define SignMask v_u32 (0x80000000) macro
54 uint32x4_t sign = vandq_u32 (ix, SignMask); in V_NAME_F1()
76 SignMask, vreinterpretq_f32_u32 (vandq_u32 (SignMask, red)), z); in V_NAME_F1()
H A Dcbrtf.c27 #define SignMask v_u32 (0x80000000) macro
107 return special_case (x, vbslq_f32 (SignMask, x, y), special); in V_NAME_F1()
110 return vbslq_f32 (SignMask, x, y); in V_NAME_F1()
H A Datan.c33 #define SignMask v_u64 (0x8000000000000000) macro
55 uint64x2_t sign = vandq_u64 (ix, SignMask); in V_NAME_D1()
77 SignMask, vreinterpretq_f64_u64 (vandq_u64 (SignMask, red)), z); in V_NAME_D1()
H A Datan2f.c28 #define SignMask v_u32 (0x80000000) macro
63 uint32x4_t sign_x = vandq_u32 (ix, SignMask); in V_NAME_F2()
64 uint32x4_t sign_y = vandq_u32 (iy, SignMask); in V_NAME_F2()
H A Datan2.c46 #define SignMask v_u64 (0x8000000000000000) macro
82 uint64x2_t sign_x = vandq_u64 (ix, SignMask); in V_NAME_D2()
83 uint64x2_t sign_y = vandq_u64 (iy, SignMask); in V_NAME_D2()
/freebsd/contrib/arm-optimized-routines/math/aarch64/sve/
H A Datanf.c25 #define SignMask (0x80000000) macro
40 svuint32_t sign = svand_x (pg, ix, SignMask); in SV_NAME_F1()
H A Datan.c31 #define SignMask (0x8000000000000000) macro
46 svuint64_t sign = svand_x (pg, ix, SignMask); in SV_NAME_D1()
H A Derff.c23 #define SignMask (0x80000000) macro
80 svuint32_t sign = svand_x (pg, ix, SignMask); in SV_NAME_F1()
H A Dasinh.c12 #define SignMask (0x8000000000000000) macro
113 svuint64_t iax = svbic_x (pg, ix, SignMask); in SV_NAME_D1()
114 svuint64_t sign = svand_x (pg, ix, SignMask); in SV_NAME_D1()
H A Derfcf.c31 #define SignMask 0x80000000 macro
97 svuint32_t sign = svand_x (pg, svreinterpret_u32 (x), SignMask); in SV_NAME_F1()
H A Derf.c29 #define SignMask (0x8000000000000000) macro
105 svuint64_t sign = svand_x (pg, ix, SignMask); in SV_NAME_D1()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp72 APInt SignMask; member
1576 State.SignMask = APInt::getSignMask(NumBits); in getSignAsIntValue()
1612 State.SignMask = APInt::getOneBitSet(LoadTy.getScalarSizeInBits(), 7); in getSignAsIntValue()
1641 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFCOPYSIGN() local
1643 SignMask); in ExpandFCOPYSIGN()
1660 SDValue ClearSignMask = DAG.getConstant(~MagAsInt.SignMask, DL, MagVT); in ExpandFCOPYSIGN()
1702 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFNEG() local
1704 DAG.getNode(ISD::XOR, DL, IntVT, SignAsInt.IntValue, SignMask); in ExpandFNEG()
1725 SDValue ClearSignMask = DAG.getConstant(~ValueAsInt.SignMask, DL, IntVT); in ExpandFABS()
2567 SDValue SignMask = DAG.getConstant(SignMaskVal, dl, AsIntVT); in expandFrexp() local
[all …]
H A DDAGCombiner.cpp6838 APInt SignMask = APInt::getSignMask(BitWidth); in foldAndToUsubsat() local
6844 if (!sd_match(N, m_And(m_OneUse(m_Xor(m_Value(X), m_SpecificInt(SignMask))), in foldAndToUsubsat()
6847 !sd_match(N, m_And(m_OneUse(m_Add(m_Value(X), m_SpecificInt(SignMask))), in foldAndToUsubsat()
6853 DAG.getConstant(SignMask, DL, VT)); in foldAndToUsubsat()
15321 APInt SignMask; in foldBitcastedFPLogic() local
15325 SignMask = ~APInt::getSignMask(SourceVT.getScalarSizeInBits()); in foldBitcastedFPLogic()
15329 SignMask = APInt::getSignMask(SourceVT.getScalarSizeInBits()); in foldBitcastedFPLogic()
15333 SignMask = APInt::getSignMask(SourceVT.getScalarSizeInBits()); in foldBitcastedFPLogic()
15358 if (LogicOp1 && LogicOp1->getAPIntValue() == SignMask && in foldBitcastedFPLogic()
27580 APInt SignMask; in foldSignChangeInBitcast() local
[all …]
H A DTargetLowering.cpp8198 SDValue SignMask = DAG.getConstant(APInt::getSignMask(SrcEltBits), dl, IntVT); in expandFP_TO_SINT() local
8210 DAG.getNode(ISD::AND, dl, IntVT, Bits, SignMask), in expandFP_TO_SINT()
8266 APInt SignMask = APInt::getSignMask(DstVT.getScalarSizeInBits()); in expandFP_TO_UINT() local
8268 APF.convertFromAPInt(SignMask, false, APFloat::rmNearestTiesToEven)) { in expandFP_TO_UINT()
8311 DAG.getConstant(SignMask, dl, DstVT)); in expandFP_TO_UINT()
8335 DAG.getConstant(SignMask, dl, DstVT)); in expandFP_TO_UINT()
H A DLegalizeFloatTypes.cpp553 APInt SignMask = APInt::getSignMask(NVT.getSizeInBits()); in SoftenFloatRes_FNEG() local
555 DAG.getConstant(SignMask, dl, NVT)); in SoftenFloatRes_FNEG()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp2650 APInt SignMask = APInt::getSignMask(Ty->getScalarSizeInBits()); in foldICmpSRemConstant() local
2651 Constant *MaskC = ConstantInt::get(Ty, SignMask | (*DivisorC - 1)); in foldICmpSRemConstant()
2666 return new ICmpInst(ICmpInst::ICMP_UGT, And, ConstantInt::get(Ty, SignMask)); in foldICmpSRemConstant()
8201 const APInt &SignMask = ~APInt::getSignMask(IntTy->getScalarSizeInBits()); in visitFCmpInst() local
8202 Value *MaskX = Builder.CreateAnd(X, ConstantInt::get(IntTy, SignMask)); in visitFCmpInst()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp3858 auto SignMask = in lower() local
3860 MIRBuilder.buildXor(Res, SubByReg, SignMask); in lower()
7066 auto SignMask = MIRBuilder.buildConstant(SrcTy, in lowerFPTOSI() local
7068 auto AndSignMask = MIRBuilder.buildAnd(SrcTy, Src, SignMask); in lowerFPTOSI()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp21930 SDValue SignMask = DAG.getConstantFP( in LowerFCOPYSIGN() local
21938 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask); in LowerFCOPYSIGN()
28164 SDValue SignMask = DAG.getConstant(C->getAPIntValue(), DL, VT); in LowerADDSAT_SUBSAT() local
28166 SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, X, SignMask); in LowerADDSAT_SUBSAT()
29391 SDValue SignMask = DAG.getConstant(0x8080, dl, ExtVT); in LowerShiftByScalarVariable() local
29392 SignMask = in LowerShiftByScalarVariable()
29393 getTargetVShiftNode(LogicalX86Op, dl, ExtVT, SignMask, BaseShAmt, in LowerShiftByScalarVariable()
29395 SignMask = DAG.getBitcast(VT, SignMask); in LowerShiftByScalarVariable()
29396 Res = DAG.getNode(ISD::XOR, dl, VT, Res, SignMask); in LowerShiftByScalarVariable()
29397 Res = DAG.getNode(ISD::SUB, dl, VT, Res, SignMask); in LowerShiftByScalarVariable()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8472 SDValue SignMask = DAG.getConstant(0x80000000, dl, DstVT); in LowerFP_TO_INT() local
8500 dl, DstVT, Sel, DAG.getConstant(0, dl, DstVT), SignMask); in LowerFP_TO_INT()
8508 True = DAG.getNode(ISD::ADD, dl, MVT::i32, True, SignMask); in LowerFP_TO_INT()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp14202 APInt SignMask = APInt::getOneBitSet(64, 31); in performSETCCCombine()
14203 if (DAG.MaskedValueIsZero(N0.getOperand(0), SignMask)) in performSETCCCombine()
14199 APInt SignMask = APInt::getOneBitSet(64, 31); performSETCCCombine() local