xref: /freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/atan2f.c (revision f3087bef11543b42e0d69b708f367097a4118d24)
1 /*
2  * Single-precision vector atan2(x) function.
3  *
4  * Copyright (c) 2021-2024, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "v_math.h"
9 #include "test_sig.h"
10 #include "test_defs.h"
11 
12 static const struct data
13 {
14   float32x4_t c0, pi_over_2, c4, c6, c2;
15   float c1, c3, c5, c7;
16   uint32x4_t comp_const;
17 } data = {
18   /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on
19      [2**-128, 1.0].
20      Generated using fpminimax between FLT_MIN and 1.  */
21   .c0 = V4 (-0x1.55555p-2f),	    .c1 = 0x1.99935ep-3f,
22   .c2 = V4 (-0x1.24051ep-3f),	    .c3 = 0x1.bd7368p-4f,
23   .c4 = V4 (-0x1.491f0ep-4f),	    .c5 = 0x1.93a2c0p-5f,
24   .c6 = V4 (-0x1.4c3c60p-6f),	    .c7 = 0x1.01fd88p-8f,
25   .pi_over_2 = V4 (0x1.921fb6p+0f), .comp_const = V4 (2 * 0x7f800000lu - 1),
26 };
27 
28 #define SignMask v_u32 (0x80000000)
29 
30 /* Special cases i.e. 0, infinity and nan (fall back to scalar calls).  */
31 static float32x4_t VPCS_ATTR NOINLINE
special_case(float32x4_t y,float32x4_t x,float32x4_t ret,uint32x4_t sign_xy,uint32x4_t cmp)32 special_case (float32x4_t y, float32x4_t x, float32x4_t ret,
33 	      uint32x4_t sign_xy, uint32x4_t cmp)
34 {
35   /* Account for the sign of y.  */
36   ret = vreinterpretq_f32_u32 (
37       veorq_u32 (vreinterpretq_u32_f32 (ret), sign_xy));
38   return v_call2_f32 (atan2f, y, x, ret, cmp);
39 }
40 
41 /* Returns 1 if input is the bit representation of 0, infinity or nan.  */
42 static inline uint32x4_t
zeroinfnan(uint32x4_t i,const struct data * d)43 zeroinfnan (uint32x4_t i, const struct data *d)
44 {
45   /* 2 * i - 1 >= 2 * 0x7f800000lu - 1.  */
46   return vcgeq_u32 (vsubq_u32 (vmulq_n_u32 (i, 2), v_u32 (1)), d->comp_const);
47 }
48 
49 /* Fast implementation of vector atan2f. Maximum observed error is
50    2.95 ULP in [0x1.9300d6p+6 0x1.93c0c6p+6] x [0x1.8c2dbp+6 0x1.8cea6p+6]:
51    _ZGVnN4vv_atan2f (0x1.93836cp+6, 0x1.8cae1p+6) got 0x1.967f06p-1
52 						 want 0x1.967f00p-1.  */
V_NAME_F2(atan2)53 float32x4_t VPCS_ATTR NOINLINE V_NAME_F2 (atan2) (float32x4_t y, float32x4_t x)
54 {
55   const struct data *d = ptr_barrier (&data);
56 
57   uint32x4_t ix = vreinterpretq_u32_f32 (x);
58   uint32x4_t iy = vreinterpretq_u32_f32 (y);
59 
60   uint32x4_t special_cases
61       = vorrq_u32 (zeroinfnan (ix, d), zeroinfnan (iy, d));
62 
63   uint32x4_t sign_x = vandq_u32 (ix, SignMask);
64   uint32x4_t sign_y = vandq_u32 (iy, SignMask);
65   uint32x4_t sign_xy = veorq_u32 (sign_x, sign_y);
66 
67   float32x4_t ax = vabsq_f32 (x);
68   float32x4_t ay = vabsq_f32 (y);
69 
70   uint32x4_t pred_xlt0 = vcltzq_f32 (x);
71   uint32x4_t pred_aygtax = vcgtq_f32 (ay, ax);
72 
73   /* Set up z for call to atanf.  */
74   float32x4_t n = vbslq_f32 (pred_aygtax, vnegq_f32 (ax), ay);
75   float32x4_t q = vbslq_f32 (pred_aygtax, ay, ax);
76   float32x4_t z = vdivq_f32 (n, q);
77 
78   /* Work out the correct shift.  */
79   float32x4_t shift = vreinterpretq_f32_u32 (
80       vandq_u32 (pred_xlt0, vreinterpretq_u32_f32 (v_f32 (-2.0f))));
81   shift = vbslq_f32 (pred_aygtax, vaddq_f32 (shift, v_f32 (1.0f)), shift);
82   shift = vmulq_f32 (shift, d->pi_over_2);
83 
84   /* Calculate the polynomial approximation.
85      Use 2-level Estrin scheme for P(z^2) with deg(P)=7. However,
86      a standard implementation using z8 creates spurious underflow
87      in the very last fma (when z^8 is small enough).
88      Therefore, we split the last fma into a mul and an fma.
89      Horner and single-level Estrin have higher errors that exceed
90      threshold.  */
91   float32x4_t z2 = vmulq_f32 (z, z);
92   float32x4_t z4 = vmulq_f32 (z2, z2);
93 
94   float32x4_t c1357 = vld1q_f32 (&d->c1);
95   float32x4_t p01 = vfmaq_laneq_f32 (d->c0, z2, c1357, 0);
96   float32x4_t p23 = vfmaq_laneq_f32 (d->c2, z2, c1357, 1);
97   float32x4_t p45 = vfmaq_laneq_f32 (d->c4, z2, c1357, 2);
98   float32x4_t p67 = vfmaq_laneq_f32 (d->c6, z2, c1357, 3);
99   float32x4_t p03 = vfmaq_f32 (p01, z4, p23);
100   float32x4_t p47 = vfmaq_f32 (p45, z4, p67);
101 
102   float32x4_t ret = vfmaq_f32 (p03, z4, vmulq_f32 (z4, p47));
103 
104   /* y = shift + z * P(z^2).  */
105   ret = vaddq_f32 (vfmaq_f32 (z, ret, vmulq_f32 (z2, z)), shift);
106 
107   if (unlikely (v_any_u32 (special_cases)))
108     {
109       return special_case (y, x, ret, sign_xy, special_cases);
110     }
111 
112   /* Account for the sign of y.  */
113   return vreinterpretq_f32_u32 (
114       veorq_u32 (vreinterpretq_u32_f32 (ret), sign_xy));
115 }
116 
117 HALF_WIDTH_ALIAS_F2 (atan2)
118 
119 /* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h.  */
120 TEST_SIG (V, F, 2, atan2)
121 TEST_DISABLE_FENV (V_NAME_F2 (atan2))
122 TEST_ULP (V_NAME_F2 (atan2), 2.46)
123 TEST_INTERVAL (V_NAME_F2 (atan2), -10.0, 10.0, 50000)
124 TEST_INTERVAL (V_NAME_F2 (atan2), -1.0, 1.0, 40000)
125 TEST_INTERVAL (V_NAME_F2 (atan2), 0.0, 1.0, 40000)
126 TEST_INTERVAL (V_NAME_F2 (atan2), 1.0, 100.0, 40000)
127 TEST_INTERVAL (V_NAME_F2 (atan2), 1e6, 1e32, 40000)
128