/freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
H A D | cpufreq-st.txt | 9 Frequency Scaling only 31 Dynamic Voltage and Frequency Scaling (DVFS)
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H A D | brcm,stb-avs-cpu-freq.txt | 17 Adaptive Voltage Scaling.
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | IRBuilder.cpp | 89 Value *IRBuilderBase::CreateVScale(Constant *Scaling, const Twine &Name) { in CreateVScale() argument 90 assert(isa<ConstantInt>(Scaling) && "Expected constant integer"); in CreateVScale() 91 if (cast<ConstantInt>(Scaling)->isZero()) in CreateVScale() 92 return Scaling; in CreateVScale() 95 Intrinsic::getDeclaration(M, Intrinsic::vscale, {Scaling->getType()}); in CreateVScale() 97 return cast<ConstantInt>(Scaling)->isOne() ? CI : CreateMul(CI, Scaling); in CreateVScale()
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/freebsd/sys/contrib/device-tree/Bindings/arm/msm/ |
H A D | qcom,saw2.txt | 4 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | armada3700-periph-clock.txt | 21 6 avs Adaptive Voltage Scaling
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/freebsd/sys/contrib/device-tree/Bindings/devfreq/ |
H A D | exynos-bus.txt | 40 to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
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/freebsd/sys/contrib/device-tree/Bindings/opp/ |
H A D | qcom-nvmem-cpufreq.txt | 7 Qualcomm Technologies, Inc. Process Voltage Scaling Tables
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVScheduleV.td | 413 // 12.4. Vector Single-Width Scaling Shift Instructions 642 // 12.4. Vector Single-Width Scaling Shift Instructions
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H A D | RISCVInstrInfoV.td | 1323 // Vector Single-Width Scaling Shift Instructions
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H A D | RISCVInstrInfoVPseudos.td | 6423 // 12.4. Vector Single-Width Scaling Shift Instructions 7089 // 12.4. Vector Single-Width Scaling Shift Instructions
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/freebsd/contrib/file/magic/Magdir/ |
H A D | riff | 148 >>>>>16 leshort&0x3fff x \bx%d, Scaling:
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/freebsd/share/misc/ |
H A D | usb_hid_usages | 1692 0x41 Data Scaling
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 5309 auto Scaling = B.buildFCmp(FCmpInst::FCMP_OLT, S1, X, ScaleConstant); in legalizeFSQRTF64() local 5313 auto ScaleUp = B.buildSelect(S32, Scaling, ScaleUpFactor, ZeroInt); in legalizeFSQRTF64() 5341 auto ScaleDown = B.buildSelect(S32, Scaling, ScaleDownFactor, ZeroInt); in legalizeFSQRTF64()
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H A D | SIISelLowering.cpp | 11095 SDValue Scaling = DAG.getSetCC(DL, MVT::i1, X, ScaleConstant, ISD::SETOLT); in lowerFSQRTF64() local 11102 DAG.getNode(ISD::SELECT, DL, MVT::i32, Scaling, ScaleUpFactor, ZeroInt); in lowerFSQRTF64() 11132 DAG.getNode(ISD::SELECT, DL, MVT::i32, Scaling, ScaleDownFactor, ZeroInt); in lowerFSQRTF64()
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | IRBuilder.h | 947 Value *CreateVScale(Constant *Scaling, const Twine &Name = "");
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | riscv_vector.td | 1450 // 12.4. Vector Single-Width Scaling Shift Instructions
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