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Searched refs:Scaling (Results 1 – 16 of 16) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-st.txt9 Frequency Scaling only
31 Dynamic Voltage and Frequency Scaling (DVFS)
H A Dbrcm,stb-avs-cpu-freq.txt17 Adaptive Voltage Scaling.
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DIRBuilder.cpp89 Value *IRBuilderBase::CreateVScale(Constant *Scaling, const Twine &Name) { in CreateVScale() argument
90 assert(isa<ConstantInt>(Scaling) && "Expected constant integer"); in CreateVScale()
91 if (cast<ConstantInt>(Scaling)->isZero()) in CreateVScale()
92 return Scaling; in CreateVScale()
95 Intrinsic::getDeclaration(M, Intrinsic::vscale, {Scaling->getType()}); in CreateVScale()
97 return cast<ConstantInt>(Scaling)->isOne() ? CI : CreateMul(CI, Scaling); in CreateVScale()
/freebsd/sys/contrib/device-tree/Bindings/arm/msm/
H A Dqcom,saw2.txt4 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Darmada3700-periph-clock.txt21 6 avs Adaptive Voltage Scaling
/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Dexynos-bus.txt40 to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dqcom-nvmem-cpufreq.txt7 Qualcomm Technologies, Inc. Process Voltage Scaling Tables
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVScheduleV.td413 // 12.4. Vector Single-Width Scaling Shift Instructions
642 // 12.4. Vector Single-Width Scaling Shift Instructions
H A DRISCVInstrInfoV.td1323 // Vector Single-Width Scaling Shift Instructions
H A DRISCVInstrInfoVPseudos.td6423 // 12.4. Vector Single-Width Scaling Shift Instructions
7089 // 12.4. Vector Single-Width Scaling Shift Instructions
/freebsd/contrib/file/magic/Magdir/
H A Driff148 >>>>>16 leshort&0x3fff x \bx%d, Scaling:
/freebsd/share/misc/
H A Dusb_hid_usages1692 0x41 Data Scaling
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp5309 auto Scaling = B.buildFCmp(FCmpInst::FCMP_OLT, S1, X, ScaleConstant); in legalizeFSQRTF64() local
5313 auto ScaleUp = B.buildSelect(S32, Scaling, ScaleUpFactor, ZeroInt); in legalizeFSQRTF64()
5341 auto ScaleDown = B.buildSelect(S32, Scaling, ScaleDownFactor, ZeroInt); in legalizeFSQRTF64()
H A DSIISelLowering.cpp11095 SDValue Scaling = DAG.getSetCC(DL, MVT::i1, X, ScaleConstant, ISD::SETOLT); in lowerFSQRTF64() local
11102 DAG.getNode(ISD::SELECT, DL, MVT::i32, Scaling, ScaleUpFactor, ZeroInt); in lowerFSQRTF64()
11132 DAG.getNode(ISD::SELECT, DL, MVT::i32, Scaling, ScaleDownFactor, ZeroInt); in lowerFSQRTF64()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIRBuilder.h947 Value *CreateVScale(Constant *Scaling, const Twine &Name = "");
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Driscv_vector.td1450 // 12.4. Vector Single-Width Scaling Shift Instructions