| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.cpp | 89 Register SPReg = CSKY::R14; in emitPrologue() local
117 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -(static_cast<int64_t>(ActualSize)), in emitPrologue()
152 .addReg(SPReg) in emitPrologue()
162 adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
173 BuildMI(MBB, MBBI, DL, TII->get(CSKY::ANDNI32), SPReg) in emitPrologue()
174 .addReg(SPReg) in emitPrologue()
183 .addReg(SPReg) in emitPrologue()
185 BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSLI32), SPReg) in emitPrologue()
191 BuildMI(MBB, MBBI, DL, TII->get(CSKY::MOV16), VR).addReg(SPReg); in emitPrologue()
198 BuildMI(MBB, MBBI, DL, TII->get(CSKY::MOV16), SPReg).addReg(VR); in emitPrologue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFrameLowering.cpp | 194 Register SPReg = LoongArch::R3; in emitPrologue() local
221 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); in emitPrologue()
250 adjustReg(MBB, MBBI, DL, FPReg, SPReg, in emitPrologue()
268 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount, in emitPrologue()
290 SPReg) in emitPrologue()
291 .addReg(SPReg) in emitPrologue()
303 .addReg(SPReg) in emitPrologue()
316 Register SPReg = LoongArch::R3; in emitEpilogue() local
336 adjustReg(MBB, LastFrameDestroy, DL, SPReg, LoongArch::R22, in emitEpilogue()
347 adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount, in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 282 unsigned SPReg = getSPReg(MF); in emitPrologue() local
284 SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue()
288 BuildMI(MBB, InsertPt, DL, TII->get(getOpcGlobGet(MF)), SPReg) in emitPrologue()
297 .addReg(SPReg); in emitPrologue()
305 .addReg(SPReg) in emitPrologue()
345 unsigned SPReg = 0; in emitEpilogue() local
349 SPReg = FI->getBasePointerVreg(); in emitEpilogue()
359 SPReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
360 BuildMI(MBB, InsertPt, DL, TII->get(getOpcAdd(MF)), SPReg) in emitEpilogue()
364 SPReg = SPFPReg; in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 652 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
814 .addReg(SPReg); in emitPrologue()
828 .addReg(SPReg); in emitPrologue()
833 .addReg(SPReg); in emitPrologue()
838 .addReg(SPReg); in emitPrologue()
849 .addReg(SPReg); in emitPrologue()
867 .addReg(SPReg); in emitPrologue()
880 .addReg(SPReg); in emitPrologue()
896 .addReg(SPReg) in emitPrologue()
897 .addReg(SPReg); in emitPrologue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 54 static constexpr MCPhysReg SPReg = RISCV::X2; variable
221 .addReg(SPReg, RegState::Define) in emitSiFiveCLICStackSwap()
223 .addReg(SPReg, RegState::Kill) in emitSiFiveCLICStackSwap()
634 CFIBuilder.buildDefCFARegister(SPReg); in allocateAndProbeStackForRVV()
638 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SUB), SPReg) in allocateAndProbeStackForRVV()
639 .addReg(SPReg) in allocateAndProbeStackForRVV()
647 .addReg(SPReg) in allocateAndProbeStackForRVV()
692 if (Reg == SPReg) in createDefCFAExpression()
751 RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackOffset::getFixed(-Offset), in allocateStack()
761 .addReg(SPReg) in allocateStack()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 135 MCRegister SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
136 assert((Mips::SP == SPReg) && "Unexpected stack-pointer register."); in sandboxLoadStoreStackChange()
137 emitMask(SPReg, LoadStoreStackMaskReg, STI); in sandboxLoadStoreStackChange()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86IndirectThunks.cpp | 229 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; in populateThunk() local
230 addRegOffset(BuildMI(CallTarget, DebugLoc(), TII->get(MovOpc)), SPReg, false, in populateThunk()
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| H A D | X86FrameLowering.h | 116 Register &SPReg) const;
118 Register &SPReg, int Adjustment) const;
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| H A D | X86CallLowering.cpp | |
| H A D | X86FrameLowering.cpp | 2360 Register SPReg; in getPSPSlotOffsetFromSP() local
2361 int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg, in getPSPSlotOffsetFromSP()
2364 assert(Offset >= 0 && SPReg == TRI->getStackRegister()); in getPSPSlotOffsetFromSP()
3664 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
3668 SPReg = X86::RSP; in adjustForHiPEPrologue()
3674 SPReg = X86::ESP; in adjustForHiPEPrologue()
3686 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg), SPReg, in adjustForHiPEPrologue()
3697 addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg), SPReg, in adjustForHiPEPrologue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 703 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
704 assert(SPReg != AMDGPU::SP_REG); in emitEntryFunctionPrologue()
705 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), SPReg).addImm(Offset); in emitEntryFunctionPrologue()
734 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
735 assert(SPReg != AMDGPU::SP_REG); in emitEntryFunctionPrologue()
742 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CSELECT_B32), SPReg) in emitEntryFunctionPrologue()
746 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), SPReg).addImm(Offset); in emitEntryFunctionPrologue()
747 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CMOVK_I32), SPReg) in emitEntryFunctionPrologue()
2036 Register SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
2041 auto Add = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), SPReg) in eliminateCallFramePseudoInstr()
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| H A D | AMDGPUCallLowering.cpp | 183 Register SPReg; member
210 if (!SPReg) { in getStackAddress()
214 SPReg = MIRBuilder.buildCopy(PtrTy, in getStackAddress()
220 SPReg = MIRBuilder.buildInstr(AMDGPU::G_AMDGPU_WAVE_ADDRESS, {PtrTy}, in getStackAddress()
227 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 69 if (!SPReg) in getStackAddress()
70 SPReg = MIRBuilder.buildCopy(p0, Register(RISCV::X2)).getReg(0); in getStackAddress()
74 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
170 Register SPReg; member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 83 auto SPReg = MIRBuilder.buildCopy(p0, StackReg).getReg(0); in getStackAddress() local
85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 97 auto SPReg = in getStackAddress() local
102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 109 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress() local
113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 272 if (!SPReg) in getStackAddress()
273 SPReg = MIRBuilder.buildCopy(p0, Register(AArch64::SP)).getReg(0); in getStackAddress()
277 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
395 Register SPReg; member
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| H A D | AArch64LegalizerInfo.cpp | 2320 Register SPReg = in legalizeDynStackAlloc() local
2323 Helper.getDynStackAllocTargetPtr(SPReg, AllocSize, Alignment, PtrTy); in legalizeDynStackAlloc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 237 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP)); in getStackAddress() local
240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 1175 MCRegister SPReg = Xtensa::SP; in LowerDYNAMIC_STACKALLOC() local
1176 SDValue SP = DAG.getCopyFromReg(Chain, DL, SPReg, VT); in LowerDYNAMIC_STACKALLOC()
1182 Chain = DAG.getCopyToReg(SP.getValue(1), DL, SPReg, NewSP); // Output chain in LowerDYNAMIC_STACKALLOC()
1185 SDValue NewVal = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i32); in LowerDYNAMIC_STACKALLOC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 1365 unsigned SPReg = Regs.getStackPointerRegister(); in emitEpilogue() local
1366 if (ZFI->getRestoreGPRRegs().LowGPR != SPReg) { in emitEpilogue()
1368 emitIncrement(MBB, MBBI, DL, SPReg, StackSize, ZII); in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1009 Register SPReg = getStackPointerRegisterToSaveRestore(); in LowerDYNAMIC_STACKALLOC() local
1012 SDValue StackPointer = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i32); in LowerDYNAMIC_STACKALLOC()
1032 SDValue CopyChain = DAG.getCopyToReg(Chain, DL, SPReg, Sub); in LowerDYNAMIC_STACKALLOC()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.h | 467 LLVM_ABI Register getDynStackAllocTargetPtr(Register SPReg,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 3409 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); in LowerDYNAMIC_STACKALLOC() local
3410 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" in LowerDYNAMIC_STACKALLOC()
3413 SDValue SP = DAG.getCopyFromReg(Chain, DL, SPReg, VT); in LowerDYNAMIC_STACKALLOC()
3421 Chain = DAG.getCopyToReg(Chain, DL, SPReg, Result); // Output chain in LowerDYNAMIC_STACKALLOC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 12146 MCRegister SPReg = tryParseRegister(); in parseDirectiveSetFP() local
12147 if (check(!SPReg, SPRegLoc, "stack pointer register expected") || in parseDirectiveSetFP()
12148 check(SPReg != ARM::SP && SPReg != UC.getFPReg(), SPRegLoc, in parseDirectiveSetFP()
12177 getTargetStreamer().emitSetFP(FPReg, SPReg, Offset); in parseDirectiveSetFP()
12464 MCRegister SPReg = tryParseRegister(); in parseDirectiveMovSP() local
12465 if (!SPReg) in parseDirectiveMovSP()
12467 if (SPReg == ARM::SP || SPReg == ARM::PC) in parseDirectiveMovSP()
12491 getTargetStreamer().emitMovSP(SPReg, Offset); in parseDirectiveMovSP()
12492 UC.saveFPReg(SPReg); in parseDirectiveMovSP()
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