/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/json/ |
H A D | tst.general.d | 31 #define SEL(ss) \ macro 40 SEL("0"); 44 SEL("0"); 45 SEL("1"); 46 SEL("100"); 47 SEL("-1"); 51 SEL("0"); 55 SEL("0"); 59 SEL("0"); 63 SEL("0"); [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600Instructions.td | 46 def SEL : OperandWithDefaultOps <i32, (ops (i32 -1))>; 105 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel, 147 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel, 148 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, ABS:$src1_abs, SEL:$src1_sel, 187 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, SEL:$src0_sel, 188 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, SEL:$src1_sel, 189 R600_Reg32:$src2, NEG:$src2_neg, REL:$src2_rel, SEL:$src2_sel, 1033 R600_TReg32_X:$src0_X, NEG:$src0_neg_X, REL:$src0_rel_X, ABS:$src0_abs_X, SEL:$src0_sel_X, 1034 R600_TReg32_X:$src1_X, NEG:$src1_neg_X, REL:$src1_rel_X, ABS:$src1_abs_X, SEL:$src1_sel_X, 1039 R600_TReg32_Y:$src0_Y, NEG:$src0_neg_Y, REL:$src0_rel_Y, ABS:$src0_abs_Y, SEL [all...] |
H A D | EvergreenInstructions.td | 615 (ins R600_Reg32:$src0, REL:$src0_rel, SEL:$src0_sel, 636 (ins R600_Reg32:$src0, REL:$src0_rel, SEL:$src0_sel, 637 R600_Reg32:$src1, REL:$src1_rel, SEL:$src1_sel, 668 (ins R600_Reg32:$src0, REL:$src0_rel, SEL:$src0_sel, 669 R600_Reg32:$src1, REL:$src1_rel, SEL:$src1_sel, 670 R600_Reg32:$src2, REL:$src2_rel, SEL:$src2_sel,
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/freebsd/share/doc/smm/18.net/ |
H A D | spell.ok | 120 SEL
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/freebsd/contrib/llvm-project/clang/include/clang/AST/ |
H A D | BuiltinTypes.def | 241 // The primitive Objective C 'SEL' type. The user-visible 'SEL'
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/freebsd/sys/riscv/sifive/ |
H A D | fu740_pci_dw.c | 245 FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, SEL), 1); in fupci_phy_init()
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am642-hummingboard-t.dts | 273 /* SEL, 10k pull-down on carrier, 2.2k pullup on SoM */
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | Builtins.def | 28 // H -> SEL
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H A D | Builtins.td | 3331 let Prototype = "id(id, SEL, ...)"; 3336 let Prototype = "long double(id, SEL, ...)"; 3341 let Prototype = "_Complex long double(id, SEL, ...)"; 3346 let Prototype = "void(id, SEL, ...)"; 3351 let Prototype = "id(objc_super*, SEL, ...)"; 3356 let Prototype = "void(objc_super*, SEL, ...)";
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/freebsd/sys/dev/sym/ |
H A D | sym_defs.h | 429 #define SEL 0x20 /* sta: selected by another device */ macro
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 1016 LoopVectorizationCostModel(ScalarEpilogueLowering SEL, Loop *L, in LoopVectorizationCostModel() argument 1025 : ScalarEpilogueStatus(SEL), TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), in LoopVectorizationCostModel() 9444 ScalarEpilogueLowering SEL = in processLoopInVPlanNativePath() local 9447 LoopVectorizationCostModel CM(SEL, L, PSE, LI, LVL, *TTI, TLI, DB, AC, ORE, F, in processLoopInVPlanNativePath() 9540 ScalarEpilogueLowering SEL) { in areRuntimeChecksProfitable() argument 9614 if (SEL == CM_ScalarEpilogueAllowed) in areRuntimeChecksProfitable() 9717 ScalarEpilogueLowering SEL = in processLoop() local 9738 if (SEL != CM_ScalarEpilogueNotNeededUsePredicate) in processLoop() 9739 SEL = CM_ScalarEpilogueNotAllowedLowTripLoop; in processLoop() 9800 LoopVectorizationCostModel CM(SEL, L, PSE, LI, &LVL, *TTI, TLI, DB, AC, ORE, in processLoop() [all …]
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/freebsd/sys/dev/usb/serial/ |
H A D | uslcom.c | 282 USLCOM_DEV(SEL, C662),
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleSwift.td | 181 // SEL 182 def : InstRW<[SwiftPredP0OneOrTwoCycle], (instregex "SEL", "t2SEL")>;
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H A D | ARMScheduleR52.td | 225 def : InstRW<[R52WriteALU_EX2, R52Read_EX1, R52Read_EX1], (instregex "SEL", "t2SEL")>;
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H A D | ARMScheduleA57.td | 358 def : InstRW<[A57WriteSEL], (instregex "(t2)?SEL")>;
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H A D | ARMScheduleA9.td | 2543 def : InstRW< [WriteALU], (instregex "SEL")>;
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
H A D | aspeed-bmc-facebook-catalina.dts | 989 "RTC_MUX_SEL","PCI_MUX_SEL","TPM_MUX_SEL","FAN_MUX-SEL",
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/freebsd/contrib/llvm-project/clang/lib/Sema/ |
H A D | Sema.cpp | 348 DeclarationName SEL = &Context.Idents.get("SEL"); in Initialize() local 349 if (IdResolver.begin(SEL) == IdResolver.end()) in Initialize()
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/freebsd/sys/dev/hwpmc/ |
H A D | hwpmc_mod.c | 546 DBG_SET_FLAG_MIN("select", SEL); in pmc_debugflags_parse() 786 PMCDBG1(CPU,SEL,2, "select-cpu cpu=%d", cpu); in pmc_select_cpu() 796 PMCDBG1(CPU,SEL,2, "select-cpu cpu=%d ok", cpu); in pmc_select_cpu()
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/freebsd/contrib/bsnmp/tests/ |
H A D | catch.hpp | 1489 id performOptionalSelector( id obj, SEL sel ); 1495 inline id performOptionalSelector( id obj, SEL sel ) { in performOptionalSelector() 1504 inline id performOptionalSelector( id obj, SEL sel ) { in performOptionalSelector() 4817 OcMethod( Class cls, SEL sel ) : m_cls( cls ), m_sel( sel ) {} in OcMethod() 4832 SEL m_sel; 4841 SEL sel = NSSelectorFromString( selStr ); in getAnnotation() 4863 SEL selector = method_getName(methods[m]); in registerTestMethods()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsScheduleGeneric.td | 1002 def : InstRW<[GenericWriteFPUS], (instregex "SEL(EQ|NE)Z_(S|D)_MMR6")>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedNeoverseV1.td | 1674 "^FTS(MUL|SEL)_ZZZ_[HSD]$")>;
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H A D | AArch64SchedNeoverseN2.td | 2068 def : InstRW<[N2Write_3cyc_1V], (instregex "^FTS(MUL|SEL)_ZZZ_[HSD]$")>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZScheduleZ15.td | 242 def : InstRW<[WLat2, FXa, NormalGr], (instregex "SEL(G|FH)?R(Asm.*)?$")>;
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H A D | SystemZScheduleZ16.td | 242 def : InstRW<[WLat2, FXa, NormalGr], (instregex "SEL(G|FH)?R(Asm.*)?$")>;
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