Home
last modified time | relevance | path

Searched refs:SDep (Results 1 – 25 of 38) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMacroFusion.cpp34 static bool isHazard(const SDep &Dep) { in isHazard()
35 return Dep.getKind() == SDep::Anti || Dep.getKind() == SDep::Output; in isHazard()
39 for (const SDep &SI : SU.Preds) in getPredClusterSU()
57 for (SDep &SI : FirstSU.Succs) in fuseInstructionPair()
61 for (SDep &SI : SecondSU.Preds) in fuseInstructionPair()
70 if (!DAG.addEdge(&SecondSU, SDep(&FirstSU, SDep::Cluster))) in fuseInstructionPair()
82 for (SDep &SI : FirstSU.Succs) in fuseInstructionPair()
86 for (SDep in fuseInstructionPair()
[all...]
H A DScheduleDAG.cpp74 LLVM_DUMP_METHOD void SDep::dump(const TargetRegisterInfo *TRI) const { in dump()
106 bool SUnit::addPred(const SDep &D, bool Required) { in addPred()
108 for (SDep &PredDep : Preds) { in addPred()
119 SDep ForwardD = PredDep; in addPred()
121 for (SDep &SuccDep : PredSU->Succs) { in addPred()
133 SDep P = D; in addPred()
137 if (D.getKind() == SDep::Data) { in addPred()
174 void SUnit::removePred(const SDep &D) { in removePred()
176 SmallVectorImpl<SDep>::iterator I = llvm::find(Preds, D); in removePred()
180 SDep P = D; in removePred()
[all …]
H A DScheduleDAGInstrs.cpp263 SDep Dep; in addPhysRegDataDeps()
265 Dep = SDep(SU, SDep::Artificial); in addPhysRegDataDeps()
277 Dep = SDep(SU, SDep::Data, UseReg); in addPhysRegDataDeps()
310 SDep::Kind Kind = MO.isUse() ? SDep::Anti : SDep::Output; in addPhysRegDeps()
320 (Kind != SDep::Output || !MO.isDead() || !DefMO.isDead())) { in addPhysRegDeps()
321 SDep Dep(SU, Kind, DefMO.getReg()); in addPhysRegDeps()
322 if (Kind != SDep::Anti) { in addPhysRegDeps()
454 SDep Dep(SU, SDep::Data, Reg); in addVRegDefDeps()
498 SDep Dep(SU, SDep::Output, Reg); in addVRegDefDeps()
546 V2SU.SU->addPred(SDep(SU, SDep::Anti, Reg)); in addVRegUseDeps()
[all …]
H A DMachinePipeliner.cpp793 if (SI.getKind() == SDep::Order) { in isSuccOrder()
884 SDep Dep(Load, SDep::Barrier); in addLoopCarriedDependences()
894 SDep Dep(Load, SDep::Barrier); in addLoopCarriedDependences()
902 SDep Dep(Load, SDep::Barrier); in addLoopCarriedDependences()
909 SDep Dep(Load, SDep::Barrier); in addLoopCarriedDependences()
918 SDep Dep(Load, SDep::Barrier); in addLoopCarriedDependences()
935 SmallVector<SDep, 4> RemoveDeps; in updatePhiDependences()
960 SDep Dep(SU, SDep::Anti, Reg); in updatePhiDependences()
968 I.addPred(SDep(SU, SDep::Barrier)); in updatePhiDependences()
980 SDep Dep(SU, SDep::Data, Reg); in updatePhiDependences()
[all …]
H A DAggressiveAntiDepBreaker.cpp257 static void AntiDepEdges(const SUnit *SU, std::vector<const SDep *> &Edges) { in AntiDepEdges()
259 for (const SDep &Pred : SU->Preds) { in AntiDepEdges()
260 if ((Pred.getKind() == SDep::Anti) || (Pred.getKind() == SDep::Output)) { in AntiDepEdges()
270 const SDep *Next = nullptr; in CriticalPathStep()
274 for (const SDep &Pred : SU->Preds) { in CriticalPathStep()
281 (NextDepth == PredTotalLatency && Pred.getKind() == SDep::Anti)) { in CriticalPathStep()
804 std::vector<const SDep *> Edges; in BreakAntiDependencies()
822 for (const SDep *Edge : Edges) { in BreakAntiDependencies()
825 if ((Edge->getKind() != SDep::Anti) && in BreakAntiDependencies()
826 (Edge->getKind() != SDep::Output)) continue; in BreakAntiDependencies()
[all …]
H A DCriticalAntiDepBreaker.cpp140 static const SDep *CriticalPathStep(const SUnit *SU) { in CriticalPathStep()
141 const SDep *Next = nullptr; in CriticalPathStep()
144 for (const SDep &P : SU->Preds) { in CriticalPathStep()
151 (NextDepth == PredTotalLatency && P.getKind() == SDep::Anti)) { in CriticalPathStep()
554 if (const SDep *Edge = CriticalPathStep(CriticalPathSU)) { in BreakAntiDependencies()
558 if (Edge->getKind() == SDep::Anti) { in BreakAntiDependencies()
577 for (const SDep &P : CriticalPathSU->Preds) in BreakAntiDependencies()
579 ? (P.getKind() != SDep::Anti || P.getReg() != AntiDepReg) in BreakAntiDependencies()
580 : (P.getKind() == SDep::Data && in BreakAntiDependencies()
H A DLatencyPriorityQueue.cpp58 for (const SDep &P : SU->Preds) { in getSingleUnscheduledPred()
76 for (const SDep &Succ : SU->Succs) in push()
90 for (const SDep &Succ : SU->Succs) in scheduledNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUExportClustering.cpp69 for (const SDep &Pred : SUb->Preds) { in buildCluster()
72 DAG->addEdge(ChainHead, SDep(PredSU, SDep::Artificial)); in buildCluster()
76 DAG->addEdge(SUb, SDep(SUa, SDep::Barrier)); in buildCluster()
78 DAG->addEdge(SUb, SDep(SUa, SDep::Cluster)); in buildCluster()
83 SmallVector<SDep, 2> ToAdd, ToRemove; in removeExportDependencies()
85 for (const SDep &Pred : SU.Preds) { in removeExportDependencies()
94 for (const SDep &ExportPred : PredSU->Preds) { in removeExportDependencies()
97 ToAdd.push_back(SDep(ExportPredSU, SDep::Barrier)); in removeExportDependencies()
102 for (SDep Pred : ToRemove) in removeExportDependencies()
104 for (SDep Pred : ToAdd) in removeExportDependencies()
[all …]
H A DSIMachineScheduler.cpp422 for (SDep& Succ : SU->Succs) { in undoSchedule()
432 void SIScheduleBlock::undoReleaseSucc(SUnit *SU, SDep *SuccEdge) { in undoReleaseSucc()
442 void SIScheduleBlock::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc()
463 for (SDep& Succ : SU->Succs) { in releaseSuccessors()
495 for (SDep& Succ : SU->Succs) { in nodeScheduled()
645 PredDep.getKind() == llvm::SDep::Data) in hasDataDependencyPred()
795 for (SDep& PredDep : SU->Preds) { in colorComputeReservedDependencies()
837 for (SDep& SuccDep : SU->Succs) { in colorComputeReservedDependencies()
917 for (SDep& SuccDep : SU->Succs) { in colorEndsAccordingToDependencies()
987 for (SDep& SuccDep : SU->Succs) { in colorMergeConstantLoadsNextGroup()
[all …]
H A DGCNMinRegStrategy.cpp88 for (auto SDep : SU->Succs) { in getReadySuccessors() local
90 for (auto PDep : SDep.getSUnit()->Preds) { in getReadySuccessors()
181 S.getKind() != SDep::Data) in bumpPredsPriority()
H A DAMDGPUIGroupLP.cpp519 Succ->Preds, [&Pred](SDep &P) { return P.getSUnit() == Pred; }); in removeEdges()
1074 [](const SDep &Succ) { return Succ.getKind() == SDep::Data; }); in apply()
1082 [](const SDep &SuccSucc) { in apply()
1083 return SuccSucc.getKind() == SDep::Data; in apply()
1115 [](const SDep &Succ) { return Succ.getKind() == SDep::Data; }); in apply()
1123 [](const SDep &SuccSucc) { in apply()
1124 return SuccSucc.getKind() == SDep::Data; in apply()
1201 if (Succ.getSUnit() == SU && Succ.getKind() == SDep::Data) in apply()
1435 [&isCvt](SDep &Succ) { in analyzeDAG()
1484 [&TII](SDep &Succ) { in analyzeDAG()
[all …]
H A DAMDGPUSubtarget.cpp868 SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, in adjustSchedDependency()
870 if (Dep.getKind() != SDep::Kind::Data || !Dep.getReg() || in adjustSchedDependency()
946 if (DAG->addEdge(SU, SDep(From, SDep::Artificial))) in linkSALUChain()
949 for (SDep &SI : From->Succs) { in linkSALUChain()
953 DAG->addEdge(SUv, SDep(SU, SDep::Artificial)); in linkSALUChain()
956 for (SDep &SI : SU->Succs) { in linkSALUChain()
H A DGCNILPSched.cpp64 for (const SDep &Pred : SU->Preds) { in CalcNodeSethiUllmanNumber()
108 for (const SDep &Succ : SU->Succs) { in closestSucc()
123 for (const SDep &Pred : SU->Preds) { in calcMaxScratches()
H A DR600Packetizer.cpp189 for (const SDep &Dep : SUJ->Succs) { in isLegalToPacketizeTogether()
192 if (Dep.getKind() == SDep::Anti) in isLegalToPacketizeTogether()
194 if (Dep.getKind() == SDep::Output) in isLegalToPacketizeTogether()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp84 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
90 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
95 void ReleasePred(SUnit *SU, SDep *PredEdge);
135 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred()
158 for (SDep &Pred : SU->Preds) { in ReleasePredecessors()
188 for (SDep &Succ : SU->Succs) { in ScheduleNodeBottomUp()
273 SDep ChainPred; in CopyAndMoveSuccessors()
274 SmallVector<SDep, 4> ChainSuccs; in CopyAndMoveSuccessors()
275 SmallVector<SDep, 4> LoadPreds; in CopyAndMoveSuccessors()
276 SmallVector<SDep, 4> NodePreds; in CopyAndMoveSuccessors()
[all …]
H A DScheduleDAGRRList.cpp224 void AddPredQueued(SUnit *SU, const SDep &D) { in AddPredQueued()
232 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
240 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
251 void ReleasePred(SUnit *SU, const SDep *PredEdge);
258 void CapturePred(SDep *PredEdge);
400 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { in ReleasePred()
558 for (SDep &Pred : SU->Preds) { in ReleasePredecessors()
772 for (SDep &Succ : SU->Succs) { in ScheduleNodeBottomUp()
822 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) { in CapturePred()
841 for (SDep &Pred : SU->Preds) { in UnscheduleNodeBottomUp()
[all …]
H A DResourcePriorityQueue.cpp69 for (SDep &Pred : SU->Preds) { in numberRCValPredInSU()
107 for (const SDep &Succ : SU->Succs) { in numberRCValSuccInSU()
144 for (const SDep &Succ : SU->Succs) in numberCtrlDepsInSU()
153 for (SDep &Pred : SU->Preds) in numberCtrlPredInSU()
211 for (const SDep &Pred : SU->Preds) { in getSingleUnscheduledPred()
228 for (const SDep &Succ : SU->Succs) in push()
267 for (const SDep &Succ : S->Succs) { in isResourceAvailable()
497 for (SDep &Pred : SU->Preds) { in scheduledNode()
512 for (const SDep &Succ : SU->Succs) { in scheduledNode()
H A DScheduleDAGVLIW.cpp81 void releaseSucc(SUnit *SU, const SDep &D);
109 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc()
135 for (SDep &Succ : SU->Succs) { in releaseSuccessors()
H A DScheduleDAGSDNodes.cpp511 SDep Dep = isChain ? SDep(OpSU, SDep::Barrier) in AddSchedEdges()
512 : SDep(OpSU, SDep::Data, PhysReg); in AddSchedEdges()
651 unsigned OpIdx, SDep& dep) const{ in computeOperandLatency()
656 if (dep.getKind() != SDep::Data) in computeOperandLatency()
813 for (const SDep &Pred : SU->Preds) { in EmitPhysRegCopy()
823 for (const SDep &Succ : SU->Succs) { in EmitPhysRegCopy()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h49 class SDep {
101 SDep() : Dep(nullptr, Data) {} in SDep() function
104 SDep(SUnit *S, Kind kind, unsigned Reg) in SDep() function
123 SDep(SUnit *S, OrderKind kind) in SDep() function
129 bool overlaps(const SDep &Other) const;
131 bool operator==(const SDep &Other) const {
135 bool operator!=(const SDep &Other) const {
262 SmallVector<SDep, 4> Preds; ///< All sunit predecessors.
263 SmallVector<SDep, 4> Succs; ///< All sunit successors.
265 typedef SmallVectorImpl<SDep>::iterator pred_iterator;
[all …]
H A DMachinePipeliner.h257 bool isBackedge(SUnit *Source, const SDep &Dep) { in isBackedge()
258 if (Dep.getKind() != SDep::Anti) in isBackedge()
263 bool isLoopCarriedDep(SUnit *Source, const SDep &Dep, bool isSucc = true);
267 unsigned getDistance(SUnit *U, SUnit *V, const SDep &Dep) { in getDistance()
270 if (V->getInstr()->isPHI() && Dep.getKind() == SDep::Anti) in getDistance()
346 for (const SDep &Succ : Node->Succs) { in NodeSet()
596 int earliestCycleInChain(const SDep &Dep);
600 int latestCycleInChain(const SDep &Dep);
H A DTargetSubtargetInfo.h46 class SDep; variable
241 int UseOpIdx, SDep &Dep, in adjustSchedDependency()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp250 SmallVector<SDep, 4> Erase; in apply()
252 if (D.getKind() == SDep::Output && D.getReg() == Hexagon::USR_OVF) in apply()
270 for (SDep &SI : SU.Succs) { in apply()
271 if (SI.getKind() != SDep::Order || SI.getLatency() != 0) in apply()
280 for (SDep &PI : SI.getSUnit()->Preds) { in apply()
281 if (PI.getSUnit() != &SU || PI.getKind() != SDep::Order) in apply()
329 DAG->addEdge(&DAG->SUnits[su], SDep(LastSequentialCall, SDep::Barrier)); in apply()
333 DAG->addEdge(&DAG->SUnits[su], SDep(&DAG->SUnits[su-1], SDep::Barrier)); in apply()
368 DAG->addEdge(&DAG->SUnits[su], SDep(LastVRegUse[*AI], SDep::Barrier)); in apply()
419 SDep A(&S0, SDep::Artificial); in apply()
[all …]
H A DHexagonVLIWPacketizer.cpp304 SDep::Kind DepType, unsigned DepReg) { in isCallDependent()
318 if (DepType == SDep::Data) { in isCallDependent()
327 static bool isRegDependence(const SDep::Kind DepType) { in isRegDependence()
328 return DepType == SDep::Data || DepType == SDep::Anti || in isRegDependence()
329 DepType == SDep::Output; in isRegDependence()
377 SDep::Kind DepType, MachineBasicBlock::iterator &MII, in promoteToDotCur()
379 assert(DepType == SDep::Data); in promoteToDotCur()
459 SDep::Kind DepType, MachineBasicBlock::iterator &MII, in promoteToDotNew()
461 assert(DepType == SDep::Data); in promoteToDotNew()
534 if (PI.getKind() != SDep::Anti && in updateOffset()
[all …]
H A DHexagonVLIWPacketizer.h119 bool isCallDependent(const MachineInstr &MI, SDep::Kind DepType,
121 bool promoteToDotCur(MachineInstr &MI, SDep::Kind DepType,
129 bool promoteToDotNew(MachineInstr &MI, SDep::Kind DepType,

12