Lines Matching refs:SDep
263 SDep Dep; in addPhysRegDataDeps()
265 Dep = SDep(SU, SDep::Artificial); in addPhysRegDataDeps()
277 Dep = SDep(SU, SDep::Data, UseReg); in addPhysRegDataDeps()
310 SDep::Kind Kind = MO.isUse() ? SDep::Anti : SDep::Output; in addPhysRegDeps()
320 (Kind != SDep::Output || !MO.isDead() || !DefMO.isDead())) { in addPhysRegDeps()
321 SDep Dep(SU, Kind, DefMO.getReg()); in addPhysRegDeps()
322 if (Kind != SDep::Anti) { in addPhysRegDeps()
454 SDep Dep(SU, SDep::Data, Reg); in addVRegDefDeps()
498 SDep Dep(SU, SDep::Output, Reg); in addVRegDefDeps()
546 V2SU.SU->addPred(SDep(SU, SDep::Anti, Reg)); in addVRegUseDeps()
560 SDep Dep(SUa, SDep::MayAliasMem); in addChainDependency()
892 SDep Dep(SU, SDep::Artificial); in buildSchedGraph()
1222 bool ScheduleDAGInstrs::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge()
1301 for (const SDep &PredDep : SU->Preds) { in visitPostorderNode()
1302 if (PredDep.getKind() != SDep::Data) in visitPostorderNode()
1330 void visitPostorderEdge(const SDep &PredDep, const SUnit *Succ) { in visitPostorderEdge()
1337 void visitCrossEdge(const SDep &PredDep, const SUnit *Succ) { in visitCrossEdge()
1380 bool joinPredSubtree(const SDep &PredDep, const SUnit *Succ, in joinPredSubtree()
1382 assert(PredDep.getKind() == SDep::Data && "Subtrees are for data edges"); in joinPredSubtree()
1393 for (const SDep &SuccDep : PredSU->Succs) { in joinPredSubtree()
1394 if (SuccDep.getKind() == SDep::Data) { in joinPredSubtree()
1442 const SDep *backtrack() { in backtrack()
1459 for (const SDep &SuccDep : SU->Succs) { in hasDataSucc()
1460 if (SuccDep.getKind() == SDep::Data && in hasDataSucc()
1484 const SDep &PredDep = *DFS.getPred(); in compute()
1487 if (PredDep.getKind() != SDep::Data in compute()
1501 const SDep *PredDep = DFS.backtrack(); in compute()