Lines Matching refs:SDep
250 SmallVector<SDep, 4> Erase; in apply()
252 if (D.getKind() == SDep::Output && D.getReg() == Hexagon::USR_OVF) in apply()
270 for (SDep &SI : SU.Succs) { in apply()
271 if (SI.getKind() != SDep::Order || SI.getLatency() != 0) in apply()
280 for (SDep &PI : SI.getSUnit()->Preds) { in apply()
281 if (PI.getSUnit() != &SU || PI.getKind() != SDep::Order) in apply()
329 DAG->addEdge(&DAG->SUnits[su], SDep(LastSequentialCall, SDep::Barrier)); in apply()
333 DAG->addEdge(&DAG->SUnits[su], SDep(&DAG->SUnits[su-1], SDep::Barrier)); in apply()
368 DAG->addEdge(&DAG->SUnits[su], SDep(LastVRegUse[*AI], SDep::Barrier)); in apply()
419 SDep A(&S0, SDep::Artificial); in apply()
437 SUnit *Src, int SrcOpIdx, SUnit *Dst, int DstOpIdx, SDep &Dep, in adjustSchedDependency()
577 SDep T = I; in restoreLatency()
608 SDep T = I; in changeLatency()
620 static SUnit *getZeroLatency(SUnit *N, SmallVector<SDep, 4> &Deps) { in getZeroLatency() argument