| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2166 std::vector<EVT> ResTys; in SelectVLD() local
2167 ResTys.push_back(ResTy); in SelectVLD()
2169 ResTys.push_back(MVT::i32); in SelectVLD()
2170 ResTys.push_back(MVT::Other); in SelectVLD()
2200 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLD()
2230 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
2302 std::vector<EVT> ResTys; in SelectVST() local
2304 ResTys.push_back(MVT::i32); in SelectVST()
2305 ResTys.push_back(MVT::Other); in SelectVST()
2361 SDNode *VSt = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVST()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 267 const EVT ResTys[] = {MVT::i64, MVT::i64, MVT::Other}; in EmitTargetCodeForSetTag() local
278 SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops); in EmitTargetCodeForSetTag()
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| H A D | AArch64ISelDAGToDAG.cpp | 1687 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectLoad() local
1689 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoad()
1717 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostLoad() local
1720 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoad()
1934 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectPredicatedLoad() local
1936 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectPredicatedLoad()
1969 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectContiguousMultiVectorLoad() local
1971 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectContiguousMultiVectorLoad()
2234 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostStore() local
2246 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostStore()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 888 SmallVector<EVT, 2> ResTys{Node->getValueType(0), Node->getValueType(1)}; in trySelect() local
890 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
958 SmallVector<EVT, 1> ResTys{Node->getValueType(0)}; in trySelect() local
960 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
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| H A D | MipsSEISelLowering.cpp | 1338 SmallVector<EVT, 2> ResTys; in lowerDSPIntr() local
1341 ResTys.push_back((Ty == MVT::i64) ? MVT::Untyped : Ty); in lowerDSPIntr()
1344 SDValue Val = DAG.getNode(Opc, DL, ResTys, Ops); in lowerDSPIntr()
1345 SDValue Out = (ResTys[0] == MVT::Untyped) ? extractLOHI(Val, DL, DAG) : Val; in lowerDSPIntr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 278 SDVTList ResTys = DAG.getVTList(MVT::i16, MVT::i16); in LowerShifts() local
317 SDValue Result = DAG.getNode(Opc, dl, ResTys, SrcLo, SrcHi, Cnt); in LowerShifts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1906 SDVTList ResTys = DAG.getVTList(ResTy, ResTy); in LowerHvxMulh()
1911 return DAG.getNode(HexagonISD::UMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
1913 return DAG.getNode(HexagonISD::SMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
1907 SDVTList ResTys = DAG.getVTList(ResTy, ResTy); LowerHvxMulh() local
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