| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2157 std::vector<EVT> ResTys; in SelectVLD() local
2158 ResTys.push_back(ResTy); in SelectVLD()
2160 ResTys.push_back(MVT::i32); in SelectVLD()
2161 ResTys.push_back(MVT::Other); in SelectVLD()
2191 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLD()
2221 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
2293 std::vector<EVT> ResTys; in SelectVST() local
2295 ResTys.push_back(MVT::i32); in SelectVST()
2296 ResTys.push_back(MVT::Other); in SelectVST()
2352 SDNode *VSt = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVST()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 345 const EVT ResTys[] = {MVT::i64, MVT::i64, MVT::Other}; in EmitTargetCodeForSetTag() local
356 SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops); in EmitTargetCodeForSetTag()
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| H A D | AArch64ISelDAGToDAG.cpp | 1738 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectLoad() local
1740 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoad()
1768 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostLoad() local
1771 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoad()
2005 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectPredicatedLoad() local
2007 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectPredicatedLoad()
2040 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectContiguousMultiVectorLoad() local
2042 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectContiguousMultiVectorLoad()
2334 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostStore() local
2346 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostStore()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 834 SmallVector<EVT, 2> ResTys{Node->getValueType(0), Node->getValueType(1)}; in trySelect() local
836 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
904 SmallVector<EVT, 1> ResTys{Node->getValueType(0)}; in trySelect() local
906 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
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| H A D | MipsSEISelLowering.cpp | 1382 SmallVector<EVT, 2> ResTys; in lowerDSPIntr() local
1385 ResTys.push_back((Ty == MVT::i64) ? MVT::Untyped : Ty); in lowerDSPIntr()
1388 SDValue Val = DAG.getNode(Opc, DL, ResTys, Ops); in lowerDSPIntr()
1389 SDValue Out = (ResTys[0] == MVT::Untyped) ? extractLOHI(Val, DL, DAG) : Val; in lowerDSPIntr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 225 SDVTList ResTys = DAG.getVTList(MVT::i16, MVT::i16); in LowerShifts() local
264 SDValue Result = DAG.getNode(Opc, dl, ResTys, SrcLo, SrcHi, Cnt); in LowerShifts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1921 SDVTList ResTys = DAG.getVTList(ResTy, ResTy); in LowerHvxMulh() local
1926 return DAG.getNode(HexagonISD::UMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
1928 return DAG.getNode(HexagonISD::SMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
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