Lines Matching refs:ResTys
1687 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectLoad() local
1689 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoad()
1717 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostLoad() local
1720 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoad()
1934 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectPredicatedLoad() local
1936 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectPredicatedLoad()
1969 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectContiguousMultiVectorLoad() local
1971 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectContiguousMultiVectorLoad()
2234 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostStore() local
2246 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostStore()
2301 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectLoadLane() local
2307 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoadLane()
2339 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostLoadLane() local
2350 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoadLane()
2421 const EVT ResTys[] = {MVT::i64, // Type of the write back register in SelectPostStoreLane() local
2430 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostStoreLane()