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Searched refs:R4 (Results 1 – 25 of 127) sorted by relevance

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/freebsd/contrib/wpa/src/crypto/
H A Dsha1-internal.c155 #define R4(v,w,x,y,z,i) \ macro
213 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
214 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
215 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
216 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
217 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/freebsd/crypto/openssh/openbsd-compat/
H A Dsha1.c46 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
88 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
89 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
90 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
91 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
92 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/freebsd/contrib/ldns/
H A Dsha1.c42 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
86 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in ldns_sha1_transform()
87 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in ldns_sha1_transform()
88 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in ldns_sha1_transform()
89 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in ldns_sha1_transform()
90 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in ldns_sha1_transform()
/freebsd/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-armv4.pl443 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9));
484 vdup.32 $R4,r6
501 vmull.u32 $D4,$R4,${R0}[1]
503 vmlal.u32 $D0,$R4,${S1}[1]
510 vmlal.u32 $D1,$R4,${S2}[1]
518 vmlal.u32 $D2,$R4,${S3}[1]
521 vmlal.u32 $D3,$R4,${S4}[1]
525 vmlal.u32 $D4,$R0,${R4}[1]
618 vtrn.32 $R4,$D4#lo
623 vshl.u32 $S4,$R4,#2
[all …]
H A Dpoly1305-s390x.pl228 my ($R3, $S3, $R4, $S4) = map("%v$_",(15..18));
293 vmlof ($ACC4,$H0,$R4);
396 vlvgg ($R4,$d1,0);
401 veslg ($S4,$R4,2);
406 vlr ($H4,$R4);
410 vag ($S4,$S4,$R4);
418 vpdi ($R4,$H4,$R4,0);
427 veslg ($S4,$R4,2);
431 vag ($S4,$S4,$R4);
440 vperm ($R4,$R4,$H4,$I0);
[all …]
H A Dpoly1305-ppc.pl768 my ($R3, $S3, $R4, $S4) = ($R1, $S1, $R2, $S2);
1010 my ($R3,$S3,$R4,$S4)=($I1,$I2,$I3,$I4);
1104 vmulouw $T0,$H0,$R4
1226 mtvrwz $R4,$h4
1234 vmr $H4,$R4
1242 vpermdi $R4,$H4,$R4,0b00
1251 vsld $S4,$R4,$T0
1255 vaddudm $S4,$S4,$R4
1270 vmrgow $R4,$R4,$H4
1274 vslw $S4,$R4,$T0
[all …]
H A Dpoly1305-armv8.pl222 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
512 ld1 {$S2,$R3,$S3,$R4},[x15],#64
568 umull $ACC4,$IN23_0,${R4}[2]
650 umlal $ACC4,$IN01_0,${R4}[0]
765 umlal2 $ACC4,$IN23_0,${R4}
803 umlal $ACC4,$IN01_0,${R4}
/freebsd/contrib/ntp/libntp/lib/isc/
H A Dsha1.c119 #define R4(v,w,x,y,z,i) \ macro
144 #define nR4(v,w,x,y,z,i) R4(*v,*w,*x,*y,*z,i)
243 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in transform()
244 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in transform()
245 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in transform()
246 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in transform()
247 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in transform()
/freebsd/contrib/one-true-awk/testdir/
H A Dres.p8 R4: ring put N at 1 with .V1 at R3.V3
9 back bond -120 from R4.V4 ; H
10 back bond 60 from R4.V3 ; H
11 R5: ring with .V1 at R4.V3
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp42 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, in getCalleeSavedRegs()
52 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, in getCalleeSavedRegs()
90 Reserved.set(MSP430::R4); in getReservedRegs()
115 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP); in eliminateFrameIndex()
163 return TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP;
H A DMSP430FrameLowering.cpp111 .addReg(MSP430::R4, RegState::Kill) in emitPrologue()
121 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MSP430::R4, true); in emitPrologue()
128 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::R4) in emitPrologue()
140 MBBJ.addLiveIn(MSP430::R4); in emitPrologue()
223 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::R4) in emitEpilogue()
231 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MSP430::R4, true); in emitEpilogue()
263 .addReg(MSP430::R4) in emitEpilogue()
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/
H A Dfastmath2_dlib_asm.S61 #define expa R4
72 #define k R4
162 #define expa R4
173 #define k R4
263 #define expa R4
375 #define expo R4
461 #define maxnegl R4
H A Dfastmath2_ldlib_asm.S56 #define expa R4
62 #define k R4
155 #define expa R4
161 #define k R4
260 #define expa R4
H A Dfastmath_dlib_asm.S63 #define expa R4
79 #define k R4
198 #define expa R4
214 #define k R4
327 #define expa R4
339 #define k R4
/freebsd/tools/test/stress2/misc/
H A Dforkbomb.sh100 if (share[R2] >= MAXPROC || share[R4] > MXFAIL)
104 atomic_add_int(&share[R4], 1);
144 MAXPROC, share[R2], share[R3], share[R4]);
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.td29 def R4 : Ri< 4, "r4">, DwarfRegNum<[4]>;
48 R4, R5, R6, R7, R8, R9, R10,
55 R4, R5, R6, R7, R8, R9, R10,
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFCallingConv.td22 CCIfType<[i64], CCAssignToReg<[ R1, R2, R3, R4, R5 ]>>,
38 [R1, R2, R3, R4, R5]>>,
41 CCIfType<[i64], CCAssignToRegWithShadow<[R1, R2, R3, R4, R5],
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp807 case ARM::R4: in emitPrologue()
847 case ARM::R4: in emitPrologue()
980 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4) in emitPrologue()
988 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4) in emitPrologue()
992 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVTi16), ARM::R4) in emitPrologue()
993 .addReg(ARM::R4) in emitPrologue()
1008 .addReg(ARM::R4, RegState::Implicit) in emitPrologue()
1019 .addReg(ARM::R4, RegState::Implicit) in emitPrologue()
1027 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
1140 case ARM::R4: in emitPrologue()
[all …]
H A DARMCallingConv.td121 // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, SpLim
122 CCIfType<[i32], CCAssignToReg<[R4, R5, R6, R7, R8, R9, R10, R11]>>
270 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
276 R6, R5, R4, (sequence "D%u", 15, 0))>;
288 def CSR_ATPCS_SplitPush : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
292 def CSR_Win_SplitFP : CalleeSavedRegs<(add R10, R9, R8, R7, R6, R5, R4,
309 R7, R6, R5, R4,
318 R5, R4, (sequence "D%u", 15, 8),
322 // Also save R7-R4 first to match the stack frame fixed spill areas.
323 def CSR_iOS : CalleeSavedRegs<(add LR, R7, R6, R5, R4, (sub CSR_AAPCS, R9))>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp73 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_AlignArgRegs()
98 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
151 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 }; in CC_PPC32_SPE_CustomSplitFP64()
180 static const MCPhysReg LoRegList[] = { PPC::R4 }; in CC_PPC32_SPE_RetF64()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td32 def SP : LanaiReg< 4, "sp", [R4]>, DwarfRegAlias<R4>;
53 R4, SP, // stack pointer
/freebsd/secure/caroot/trusted/
H A DGlobalSign_ECC_Root_CA_-_R4.pem2 ## GlobalSign ECC Root CA - R4
20 Issuer: OU = GlobalSign ECC Root CA - R4, O = GlobalSign, CN = GlobalSign
24 Subject: OU = GlobalSign ECC Root CA - R4, O = GlobalSign, CN = GlobalSign
H A DGTS_Root_R4.pem2 ## GTS Root R4
20 Issuer: C = US, O = Google Trust Services LLC, CN = GTS Root R4
24 Subject: C = US, O = Google Trust Services LLC, CN = GTS Root R4
/freebsd/contrib/llvm-project/compiler-rt/lib/orc/tests/unit/
H A Dexecutor_address_test.cpp88 ExecutorAddrRange R0(A0, A1), R1(A1, A2), R2(A2, A3), R3(A0, A2), R4(A1, A3); in TEST() local
107 EXPECT_TRUE(R1.overlaps(R4)); in TEST()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandPseudoInsts.cpp301 BuildMI(MBB, MBBI, DL, TII->get(ADDI), LoongArch::R4) in expandLoadAddressTLSDesc()
306 .addReg(LoongArch::R4) in expandLoadAddressTLSDesc()
314 .addReg(LoongArch::R4) in expandLoadAddressTLSDesc()
642 BuildMI(MBB, MBBI, DL, TII->get(LoongArch::PCALAU12I), LoongArch::R4) in expandLoadAddressTLSDescPcLarge()
653 BuildMI(MBB, MBBI, DL, TII->get(LoongArch::ADD_D), LoongArch::R4) in expandLoadAddressTLSDescPcLarge()
655 .addReg(LoongArch::R4); in expandLoadAddressTLSDescPcLarge()
657 .addReg(LoongArch::R4) in expandLoadAddressTLSDescPcLarge()
663 .addReg(LoongArch::R4) in expandLoadAddressTLSDescPcLarge()

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