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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrPredicates.td1 //===---X86InstrPredicates.td - X86 Predicate Definitions --*- tablegen -*-===//
9 def TruePredicate : Predicate<"true">;
35 def HasEGPR : Predicate<"Subtarget->hasEGPR()">;
36 def NoEGPR : Predicate<"!Subtarget->hasEGPR()">;
46 def HasNDD : Predicate<"Subtarget->hasNDD()">;
47 def NoNDD : Predicate<"!Subtarget->hasNDD()">;
48 def HasCF : Predicate<"Subtarget->hasCF()">;
49 def HasCMOV : Predicate<"Subtarget->canUseCMOV()">;
50 def NoCMOV : Predicate<"!Subtarget->canUseCMOV()">;
51 def HasNOPL : Predicate<"Subtarget->hasNOPL()">;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMPredicates.td9 def HasV4T : Predicate<"Subtarget->hasV4TOps()">,
11 def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
12 def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
14 def NoV5T : Predicate<"!Subtarget->hasV5TOps()">;
15 def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
17 def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
19 def NoV6 : Predicate<"!Subtarget->hasV6Ops()">;
20 def HasV6M : Predicate<"Subtarget->hasV6MOps()">,
23 def HasV8MBaseline : Predicate<"Subtarget->hasV8MBaselineOps()">,
26 def HasV8MMainline : Predicate<"Subtarget->hasV8MMainlineOps()">,
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DMacroFusionPredicatorEmitter.cpp128 for (Record *Predicate : Predicates) { in emitPredicates()
129 Record *Target = Predicate->getValueAsDef("Target"); in emitPredicates()
131 emitFirstPredicate(Predicate, IsCommutable, PE, OS); in emitPredicates()
133 emitSecondPredicate(Predicate, IsCommutable, PE, OS); in emitPredicates()
135 emitBothPredicate(Predicate, IsCommutable, PE, OS); in emitPredicates()
142 void MacroFusionPredicatorEmitter::emitFirstPredicate(Record *Predicate, in emitFirstPredicate() argument
146 if (Predicate->isSubClassOf("WildcardPred")) { in emitFirstPredicate()
149 << (Predicate->getValueAsBit("ReturnValue") ? "true" : "false") in emitFirstPredicate()
151 } else if (Predicate->isSubClassOf("OneUsePred")) { in emitFirstPredicate()
158 } else if (Predicate->isSubClassOf("FusionPredicateWithMCInstPredicate")) { in emitFirstPredicate()
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H A DGlobalISelEmitter.cpp202 const TreePredicateFn &Predicate = Call.Fn; in isTrivialOperatorNode() local
204 if (Predicate.isAlwaysTrue()) in isTrivialOperatorNode()
207 if (Predicate.isImmediatePattern()) in isTrivialOperatorNode()
210 if (Predicate.hasNoUse() || Predicate.hasOneUse()) in isTrivialOperatorNode()
213 if (Predicate.isNonExtLoad() || Predicate.isAnyExtLoad() || in isTrivialOperatorNode()
214 Predicate.isSignExtLoad() || Predicate.isZeroExtLoad()) in isTrivialOperatorNode()
217 if (Predicate.isNonTruncStore() || Predicate.isTruncStore()) in isTrivialOperatorNode()
220 if (Predicate.isLoad() && Predicate.getMemoryVT()) in isTrivialOperatorNode()
223 if (Predicate.isLoad() || Predicate.isStore()) { in isTrivialOperatorNode()
224 if (Predicate.isUnindexed()) in isTrivialOperatorNode()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFeatures.td78 def HasStdExtZicbom : Predicate<"Subtarget->hasStdExtZicbom()">,
85 def HasStdExtZicbop : Predicate<"Subtarget->hasStdExtZicbop()">,
93 def HasStdExtZicboz : Predicate<"Subtarget->hasStdExtZicboz()">,
116 def HasStdExtZicsr : Predicate<"Subtarget->hasStdExtZicsr()">,
129 def HasStdExtZicond : Predicate<"Subtarget->hasStdExtZicond()">,
136 def HasStdExtZifencei : Predicate<"Subtarget->hasStdExtZifencei()">,
144 def HasStdExtZihintpause : Predicate<"Subtarget->hasStdExtZihintpause()">,
152 def HasStdExtZihintntl : Predicate<"Subtarget->hasStdExtZihintntl()">,
163 def HasStdExtZimop : Predicate<"Subtarget->hasStdExtZimop()">,
171 def HasStdExtZicfilp : Predicate<"Subtarget->hasStdExtZicfilp()">,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPU.td1764 // Predicate helper class
1768 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
1772 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1777 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1783 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1789 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1793 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1798 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1804 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1810 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
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H A DAMDGPUPredicateControl.td9 def TruePredicate : Predicate<"">;
12 def FalsePredicate : Predicate<"false">;
16 class True16PredicateClass<string cond> : Predicate<cond>;
20 Predicate SubtargetPredicate = TruePredicate;
21 Predicate AssemblerPredicate = TruePredicate;
22 Predicate WaveSizePredicate = TruePredicate;
24 list<Predicate> OtherPredicates = [];
25 list<Predicate> Predicates =
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCPredicates.h26 enum Predicate { enum
70 Predicate InvertPredicate(Predicate Opcode);
74 Predicate getSwappedPredicate(Predicate Opcode);
77 inline unsigned getPredicateCondition(Predicate Opcode) { in getPredicateCondition()
82 inline unsigned getPredicateHint(Predicate Opcode) { in getPredicateHint()
87 inline Predicate getPredicate(unsigned Condition, unsigned Hint) { in getPredicate()
88 return (Predicate)((Condition & ~BR_HINT_MASK) | in getPredicate()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h228 template <typename Predicate> Predicate predNot(Predicate P) { in predNot()
233 template<typename Predicate>
234 Predicate all(Predicate P0, Predicate P1) { in all()
240 template<typename Predicate, typename... Args>
241 Predicate all(Predicate P0, Predicate P1, Args... args) { in all()
246 template<typename Predicate>
247 Predicate any(Predicate P0, Predicate P1) { in any()
253 template<typename Predicate, typename... Args>
254 Predicate any(Predicate P0, Predicate P1, Args... args) { in any()
400 LegalityPredicate Predicate; variable
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepArch.td12 def HasV5 : Predicate<"HST->hasV5Ops()">, AssemblerPredicate<(all_of ArchV5)>;
14 def HasV55 : Predicate<"HST->hasV55Ops()">, AssemblerPredicate<(all_of ArchV55)>;
16 def HasV60 : Predicate<"HST->hasV60Ops()">, AssemblerPredicate<(all_of ArchV60)>;
18 def HasV62 : Predicate<"HST->hasV62Ops()">, AssemblerPredicate<(all_of ArchV62)>;
20 def HasV65 : Predicate<"HST->hasV65Ops()">, AssemblerPredicate<(all_of ArchV65)>;
22 def HasV66 : Predicate<"HST->hasV66Ops()">, AssemblerPredicate<(all_of ArchV66)>;
24 def HasV67 : Predicate<"HST->hasV67Ops()">, AssemblerPredicate<(all_of ArchV67)>;
26 def HasV68 : Predicate<"HST->hasV68Ops()">, AssemblerPredicate<(all_of ArchV68)>;
28 def HasV69 : Predicate<"HST->hasV69Ops()">, AssemblerPredicate<(all_of ArchV69)>;
30 def HasV71 : Predicate<"HST->hasV71Ops()">, AssemblerPredicate<(all_of ArchV71)>;
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H A DHexagon.td112 // Hexagon Instruction Predicate Definitions.
115 def UseMEMOPS : Predicate<"HST->useMemops()">;
116 def UseHVX64B : Predicate<"HST->useHVX64BOps()">,
118 def UseHVX128B : Predicate<"HST->useHVX128BOps()">,
120 def UseHVX : Predicate<"HST->useHVXOps()">,
122 def UseHVXV60 : Predicate<"HST->useHVXV60Ops()">,
124 def UseHVXV62 : Predicate<"HST->useHVXV62Ops()">,
126 def UseHVXV65 : Predicate<"HST->useHVXV65Ops()">,
128 def UseHVXV66 : Predicate<"HST->useHVXV66Ops()">,
130 def UseHVXV67 : Predicate<"HST->useHVXV67Ops()">,
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/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DCmpInstAnalysis.h46 unsigned getICmpCode(CmpInst::Predicate Pred);
55 CmpInst::Predicate &Pred);
59 bool predicatesFoldable(CmpInst::Predicate P1, CmpInst::Predicate P2);
63 inline unsigned getFCmpCode(CmpInst::Predicate CC) { in getFCmpCode()
92 CmpInst::Predicate &Pred);
97 bool decomposeBitTestICmp(Value *LHS, Value *RHS, CmpInst::Predicate &Pred,
H A DScalarEvolution.h283 const ICmpInst::Predicate Pred;
289 const ICmpInst::Predicate Pred,
297 ICmpInst::Predicate getPredicate() const { return Pred; }
784 bool isLoopEntryGuardedByCond(const Loop *L, ICmpInst::Predicate Pred,
790 ICmpInst::Predicate Pred, const SCEV *LHS,
795 bool isLoopBackedgeGuardedByCond(const Loop *L, ICmpInst::Predicate Pred,
1068 bool isKnownViaInduction(ICmpInst::Predicate Pred, const SCEV *LHS,
1073 bool isKnownPredicate(ICmpInst::Predicate Pred, const SCEV *LHS,
1079 std::optional<bool> evaluatePredicate(ICmpInst::Predicate Pred,
1084 bool isKnownPredicateAt(ICmpInst::Predicate Pred, const SCEV *LHS,
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/freebsd/contrib/llvm-project/lldb/include/lldb/Utility/
H A DPredicate.h42 template <class T> class Predicate {
48 Predicate() : m_value() {} in Predicate() function
57 Predicate(T initial_value) : m_value(initial_value) {} in Predicate() function
62 ~Predicate() = default;
226 Predicate(const Predicate &) = delete;
227 const Predicate &operator=(const Predicate &) = delete;
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve.td171 defvar pred_cg = (IRInt<"fma_predicated", [Vector, Predicate]>
178 Predicate:$pred), pred_cg>;
191 Predicate:$pred),
195 Predicate:$pred),
214 Vector, (args Vector:$addend, Vector:$m1, Scalar:$m2_s, Predicate:$pred),
215 (IRInt<"vmla_n_predicated", [Vector, Predicate]>
218 Vector, (args Vector:$m1, Vector:$m2, Scalar:$addend_s, Predicate:$pred),
219 (IRInt<"vmlas_n_predicated", [Vector, Predicate]>
232 Vector, (args Vector:$addend, Vector:$m1, Scalar:$m2_s, Predicate:$pred),
233 (IRInt<NAME # "h_predicated", [Vector, Predicate]>
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKY.td24 def HasFPUv2_SF : Predicate<"Subtarget->hasFPUv2SingleFloat()">,
31 def HasFPUv2_DF : Predicate<"Subtarget->hasFPUv2DoubleFloat()">,
37 def HasFdivdu : Predicate<"Subtarget->hasFdivdu()">,
44 def HasFPUv3_HI : Predicate<"Subtarget->hasFPUv3HalfWord()">,
51 def HasFPUv3_HF : Predicate<"Subtarget->hasFPUv3HalfFloat()">,
58 def HasFPUv3_SF : Predicate<"Subtarget->hasFPUv3SingleFloat()">,
65 def HasFPUv3_DF : Predicate<"Subtarget->hasFPUv3DoubleFloat()">,
71 def iHasFLOATE1 : Predicate<"Subtarget->hasFLOATE1()">,
77 def iHasFLOAT1E2 : Predicate<"Subtarget->hasFLOAT1E2()">,
83 def iHasFLOAT1E3 : Predicate<"Subtarget->hasFLOAT1E3()">,
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagPredicateDependencyEdge.h
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstrTypes.h757 enum Predicate : unsigned {
793 Bitfield::Element<Predicate, 0, 6, LAST_ICMP_PREDICATE>;
797 return enum_seq_inclusive(Predicate::FIRST_FCMP_PREDICATE,
798 Predicate::LAST_FCMP_PREDICATE,
804 return enum_seq_inclusive(Predicate::FIRST_ICMP_PREDICATE,
805 Predicate::LAST_ICMP_PREDICATE,
810 CmpInst(Type *ty, Instruction::OtherOps op, Predicate pred, Value *LHS,
825 static CmpInst *Create(OtherOps Op, Predicate Pred, Value *S1, Value *S2,
835 static CmpInst *CreateWithCopiedFlags(OtherOps Op, Predicate Pred, Value *S1,
847 Predicate getPredicate() const { return getSubclassData<PredicateField>(); }
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/freebsd/sys/contrib/dev/acpica/compiler/
H A Dasltransform.c629 ACPI_PARSE_OBJECT *Predicate; in TrDoSwitch() local
702 Predicate = CaseOp->Asl.Child; in TrDoSwitch()
704 if ((Predicate->Asl.ParseOpcode == PARSEOP_PACKAGE) || in TrDoSwitch()
705 (Predicate->Asl.ParseOpcode == PARSEOP_VAR_PACKAGE)) in TrDoSwitch()
714 Predicate->Asl.Next = NewOp2; in TrDoSwitch()
721 TrAmlInitLineNumbers (NewOp2, Predicate); in TrDoSwitch()
726 TrAmlInitLineNumbers (NewOp2, Predicate); in TrDoSwitch()
731 TrAmlInitLineNumbers (NewOp2, Predicate); in TrDoSwitch()
736 TrAmlInitLineNumbers (NewOp2, Predicate); in TrDoSwitch()
739 NewOp2->Asl.Child = Predicate; /* PARSEOP_PACKAGE */ in TrDoSwitch()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArch.td24 : Predicate<"Subtarget->is64Bit()">,
28 : Predicate<"!Subtarget->is64Bit()">,
39 def HasBasicF : Predicate<"Subtarget->hasBasicF()">;
46 def HasBasicD : Predicate<"Subtarget->hasBasicD()">;
52 def HasExtLSX : Predicate<"Subtarget->hasExtLSX()">;
59 def HasExtLASX : Predicate<"Subtarget->hasExtLASX()">;
65 def HasExtLVZ : Predicate<"Subtarget->hasExtLVZ()">;
71 def HasExtLBT : Predicate<"Subtarget->hasExtLBT()">;
78 : Predicate<"Subtarget->hasLaGlobalWithPcrel()">,
87 : Predicate<"Subtarget->hasLaGlobalWithAbs()">,
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/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DConstantFold.cpp986 static ICmpInst::Predicate areGlobalsPotentiallyEqual(const GlobalValue *GV1, in areGlobalsPotentiallyEqual()
1016 static ICmpInst::Predicate evaluateICmpRelation(Constant *V1, Constant *V2) { in evaluateICmpRelation()
1039 ICmpInst::Predicate SwappedRelation = evaluateICmpRelation(V2, V1); in evaluateICmpRelation()
1125 Constant *llvm::ConstantFoldCompareInstruction(CmpInst::Predicate Predicate, in ConstantFoldCompareInstruction() argument
1135 if (Predicate == FCmpInst::FCMP_FALSE) in ConstantFoldCompareInstruction()
1138 if (Predicate == FCmpInst::FCMP_TRUE) in ConstantFoldCompareInstruction()
1146 bool isIntegerPredicate = ICmpInst::isIntPredicate(Predicate); in ConstantFoldCompareInstruction()
1150 if (ICmpInst::isEquality(Predicate) || (isIntegerPredicate && C1 == C2)) in ConstantFoldCompareInstruction()
1156 return ConstantInt::get(ResultTy, CmpInst::isTrueWhenEqual(Predicate)); in ConstantFoldCompareInstruction()
1160 return ConstantInt::get(ResultTy, CmpInst::isUnordered(Predicate)); in ConstantFoldCompareInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DCmpInstAnalysis.cpp21 unsigned llvm::getICmpCode(CmpInst::Predicate Pred) { in getICmpCode()
41 CmpInst::Predicate &Pred) { in getPredForICmpCode()
58 bool llvm::predicatesFoldable(ICmpInst::Predicate P1, ICmpInst::Predicate P2) { in predicatesFoldable()
65 CmpInst::Predicate &Pred) { in getPredForFCmpCode()
66 Pred = static_cast<FCmpInst::Predicate>(Code); in getPredForFCmpCode()
77 CmpInst::Predicate &Pred, in decomposeBitTestICmp()
/freebsd/contrib/llvm-project/libcxx/include/
H A Dcondition_variable34 template <class Predicate>
35 void wait(unique_lock<mutex>& lock, Predicate pred);
42 template <class Clock, class Duration, class Predicate>
46 Predicate pred);
53 template <class Rep, class Period, class Predicate>
57 Predicate pred);
79 template <class Lock, class Predicate>
80 void wait(Lock& lock, Predicate pred);
87 template <class Lock, class Clock, class Duration, class Predicate>
91 Predicate pred);
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DInjectTLIMappings.cpp94 auto AddVariantDecl = [&](const ElementCount &VF, bool Predicate) { in addMappingsFromTLI()
95 const VecDesc *VD = TLI.getVectorMappingInfo(ScalarName, VF, Predicate); in addMappingsFromTLI()
42 addVariantDeclaration(CallInst & CI,const ElementCount & VF,bool Predicate,const StringRef VFName) addVariantDeclaration() argument
93 __anon6d2b60130102(const ElementCount &VF, bool Predicate) addMappingsFromTLI() argument
/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/
H A DPPCTargetParser.def194 …FEATURE("4xxmac","4xx CPU has a Multiply Accumulator",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0)
196 …EATURE("arch_2_05","CPU supports ISA 205 (eg, POWER6)",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0)
201 …TURE("booke","CPU supports the Embedded ISA category",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0)
202 PPC_AIX_FEATURE("cellbe","CPU has a CELL broadband engine",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate…
207 …,"CPU has a SPE single precision floating point unit",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0)
208 …,"CPU has a SPE double precision floating point unit",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0)
209 PPC_AIX_FEATURE("fpu","CPU has a floating point unit",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0)
211 …E("isel","CPU supports the integer select instruction",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0)
213 PPC_AIX_FEATURE("mmu","CPU has a memory management unit",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),…
214 …FEATURE("pa6t","CPU supports the PA Semi 6T CORE ISA",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0)
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