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Searched refs:OrigVT (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp63 static void applyStackPassedSmallTypeDAGHack(EVT OrigVT, MVT &ValVT, in applyStackPassedSmallTypeDAGHack() argument
71 if (OrigVT == MVT::i1 || OrigVT == MVT::i8) in applyStackPassedSmallTypeDAGHack()
73 else if (OrigVT == MVT::i16) in applyStackPassedSmallTypeDAGHack()
92 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
96 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
97 return IncomingValueAssigner::assignArg(ValNo, OrigVT, ValVT, LocVT, in assignArg()
118 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
130 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp41 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
53 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
69 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
81 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp44 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
190 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2777 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
2778 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
2783 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument
2784 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
2785 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
2787 void setOperationPromotedToType(ArrayRef<unsigned> Ops, MVT OrigVT, in setOperationPromotedToType() argument
2790 setOperationAction(Op, OrigVT, Promote); in setOperationPromotedToType()
2791 AddPromotedToType(Op, OrigVT, DestVT); in setOperationPromotedToType()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h200 virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp786 const EVT OrigVT = EVT::getEVT(Args[i].Ty); in handleAssignments() local
830 bool BigEndianPartOrdering = TLI->hasBigEndianPartOrdering(OrigVT, DL); in handleAssignments()
973 if (Handler.isIncomingArgumentHandler() && OrigVT != LocVT && in handleAssignments()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp
H A DX86ISelLowering.cpp33354 MVT OrigVT = VT; in LowerMGATHER() local
33381 SDValue Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OrigVT, NewGather, in LowerMGATHER()
54663 EVT OrigVT = N->getValueType(0); in combineFneg() local
54685 return DAG.getBitcast(OrigVT, NewNode); in combineFneg()
54692 return DAG.getBitcast(OrigVT, NegArg); in combineFneg()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp68 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp7240 EVT OrigVT = SubVec.getValueType(); in WidenVecOp_INSERT_SUBVECTOR() local
7273 if (!IndicesValid || OrigVT.isScalableVector()) in WidenVecOp_INSERT_SUBVECTOR()
7282 for (unsigned I = 0, E = OrigVT.getVectorNumElements(); I != E; ++I) { in WidenVecOp_INSERT_SUBVECTOR()
7668 EVT OrigVT = N->getOperand(0).getValueType(); in WidenVecOp_VECREDUCE() local
7670 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE()
7679 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE()
7695 OrigVT.getVectorElementCount()); in WidenVecOp_VECREDUCE()
7722 EVT OrigVT = VecOp.getValueType(); in WidenVecOp_VECREDUCE_SEQ() local
7724 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE_SEQ()
7732 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE_SEQ()
[all …]
H A DLegalizeDAG.cpp340 EVT OrigVT = VT; in ExpandConstantFP() local
351 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
352 TLI.ShouldShrinkFPConstant(OrigVT)) { in ExpandConstantFP()
367 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
373 OrigVT, dl, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
H A DDAGCombiner.cpp13994 EVT OrigVT = N->getOperand(0).getValueType(); in CombineZExtLogicopShiftLoad() local
13995 if (TLI.isZExtFree(OrigVT, VT)) in CombineZExtLogicopShiftLoad()
14250 EVT OrigVT = ALoad->getValueType(0); in tryToFoldExtOfAtomicLoad() local
14251 assert(OrigVT.getSizeInBits() < VT.getSizeInBits() && "VT should be wider."); in tryToFoldExtOfAtomicLoad()
14257 DAG.getNode(ISD::TRUNCATE, SDLoc(ALoad), OrigVT, SDValue(NewALoad, 0))); in tryToFoldExtOfAtomicLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5365 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
5366 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
5371 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
5372 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp4133 static Align CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
4162 if (Flags.isSplit() && OrigVT != MVT::ppcf128) in CalculateStackSlotAlignment()
4163 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment()
4175 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotUsed() argument
4184 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
4577 EVT OrigVT = Ins[ArgNo].ArgVT; in LowerFormalArguments_64SVR4() local
4593 CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); in LowerFormalArguments_64SVR4()
6322 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
6367 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in LowerCall_64SVR4()
6436 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9540 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
9541 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
9542 return OrigVT; in getExtensionTo64Bits()
9544 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
9546 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()