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Searched refs:OS_REG_RMW_FIELD (Results 1 – 25 of 47) sorted by relevance

12

/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_cal.c81 OS_REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1); in ar9285_hw_pa_cal()
82 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1); in ar9285_hw_pa_cal()
83 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1); in ar9285_hw_pa_cal()
84 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1); in ar9285_hw_pa_cal()
85 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0); in ar9285_hw_pa_cal()
86 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0); in ar9285_hw_pa_cal()
87 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0); in ar9285_hw_pa_cal()
88 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0); in ar9285_hw_pa_cal()
89 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0); in ar9285_hw_pa_cal()
90 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0); in ar9285_hw_pa_cal()
[all …]
H A Dar9287_reset.c87 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ar9287SetPowerCalTable()
89 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ar9287SetPowerCalTable()
91 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ar9287SetPowerCalTable()
93 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, in ar9287SetPowerCalTable()
505 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ar9287SetBoardValues()
508 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ar9287SetBoardValues()
511 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ar9287SetBoardValues()
514 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ar9287SetBoardValues()
520 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ar9287SetBoardValues()
523 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ar9287SetBoardValues()
[all …]
H A Dar9285_reset.c206 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
208 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
210 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
212 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
216 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ar9285SetBoardGain()
219 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ar9285SetBoardGain()
221 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ar9285SetBoardGain()
224 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ar9285SetBoardGain()
228 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ar9285SetBoardGain()
230 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ar9285SetBoardGain()
[all …]
H A Dar9280_olc.c106 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3); in ar9280olcGetPDADCs()
107 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3); in ar9280olcGetPDADCs()
109 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7, AR_PHY_TX_PWRCTRL_INIT_TX_GAIN, initTxGain); in ar9280olcGetPDADCs()
165 OS_REG_RMW_FIELD(ah, in ar9280olcTemperatureCompensation()
H A Dar9287_olc.c93 OS_REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11, in ar9287olcTemperatureCompensation()
95 OS_REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11, in ar9287olcTemperatureCompensation()
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_gpio.c219 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, in ar5416GpioSetIntr()
224 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, in ar5416GpioSetIntr()
230 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE, in ar5416GpioSetIntr()
235 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK, in ar5416GpioSetIntr()
240 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_CAUSE, in ar5416GpioSetIntr()
252 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_POL, in ar5416GpioSetIntr()
258 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, in ar5416GpioSetIntr()
263 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, in ar5416GpioSetIntr()
269 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE, in ar5416GpioSetIntr()
274 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK, in ar5416GpioSetIntr()
H A Dar5416_btcoex.c245 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, in ar5416BTCoexDisable()
247 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, AR_PCU_BT_ANT_PREVENT_RX, in ar5416BTCoexDisable()
291 OS_REG_RMW_FIELD(ah, AR_QUIET1, in ar5416BTCoexEnable()
294 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, in ar5416BTCoexEnable()
297 OS_REG_RMW_FIELD(ah, AR_QUIET1, in ar5416BTCoexEnable()
300 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, in ar5416BTCoexEnable()
349 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ar5416InitBTCoex()
352 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ar5416InitBTCoex()
387 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ar5416InitBTCoex()
H A Dar5416_ani.c236 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5416AniControl()
238 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5416AniControl()
240 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5416AniControl()
242 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5416AniControl()
262 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5416AniControl()
264 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5416AniControl()
266 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5416AniControl()
268 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5416AniControl()
270 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5416AniControl()
272 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5416AniControl()
[all …]
H A Dar5416_reset.c347 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, in ar5416Reset()
377 OS_REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
425 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 250);
426 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 700);
885 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5416SetDeltaSlope()
887 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5416SetDeltaSlope()
899 OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5416SetDeltaSlope()
901 OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5416SetDeltaSlope()
1547 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ar5416SetDefGainValues()
1550 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ar5416SetDefGainValues()
[all …]
H A Dar5416_cal_iq.c122 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i), in ar5416IQCalibration()
124 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i), in ar5416IQCalibration()
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_spectral.c124 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRPWR, 0x7f); in ar9300_disable_weak_signal()
128 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRSTEP, 0x3f); in ar9300_disable_weak_signal()
131 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELPWR, 0x1f); in ar9300_disable_weak_signal()
135 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELSTEP, 0x1f); in ar9300_disable_weak_signal()
139 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_FIRPWR, 0x7f); in ar9300_disable_weak_signal()
144 OS_REG_RMW_FIELD( in ar9300_disable_weak_signal()
148 OS_REG_RMW_FIELD( in ar9300_disable_weak_signal()
163 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_RSSI_THR1A, 0x7f); in ar9300_disable_strong_signal()
169 OS_REG_RMW_FIELD(ah, AR_PHY_CCA_0, AR_PHY_CCA_THRESH62, thresh62); in ar9300_set_cca_threshold()
170 OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, thresh62); in ar9300_set_cca_threshold()
[all …]
H A Dar9300_reset.c190 OS_REG_RMW_FIELD(ah, in ar9300_init_mfp()
205 OS_REG_RMW_FIELD(ah, in ar9300_init_mfp()
809 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, AR_PHY_TIMING3_DSC_MAN, ds_coef_man); in ar9300_set_delta_slope()
810 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, AR_PHY_TIMING3_DSC_EXP, ds_coef_exp); in ar9300_set_delta_slope()
821 OS_REG_RMW_FIELD(ah, AR_PHY_SGI_DELTA, AR_PHY_SGI_DSC_MAN, ds_coef_man); in ar9300_set_delta_slope()
822 OS_REG_RMW_FIELD(ah, AR_PHY_SGI_DELTA, AR_PHY_SGI_DSC_EXP, ds_coef_exp); in ar9300_set_delta_slope()
917 OS_REG_RMW_FIELD( in ar9300_set_11n_regs()
1006 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_mrc_cck()
1009 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_mrc_cck()
1012 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_mrc_cck()
[all …]
H A Dar9300_eeprom.c1321 OS_REG_RMW_FIELD(ah, 0x16c88, AR_PHY_CTRL2_TX_CAL_EN, 0x0); in ar9300_internal_regulator_apply()
1322 OS_REG_RMW_FIELD(ah, 0x16c88, AR_PHY_CTRL2_TX_CAL_SEL, 0x0); in ar9300_internal_regulator_apply()
1323 OS_REG_RMW_FIELD(ah, 0x16c88, in ar9300_internal_regulator_apply()
1378 OS_REG_RMW_FIELD(ah, reg_PMU2, AR_PHY_PMU2_PGM, 0x0); in ar9300_internal_regulator_apply()
1425 OS_REG_RMW_FIELD(ah, reg_PMU2, AR_PHY_PMU2_PGM, 0x0); in ar9300_internal_regulator_apply()
1431 OS_REG_RMW_FIELD(ah, reg_PMU1, AR_PHY_PMU1_PWD, 0x1); in ar9300_internal_regulator_apply()
1437 OS_REG_RMW_FIELD(ah, reg_PMU2, AR_PHY_PMU2_PGM, 0x1); in ar9300_internal_regulator_apply()
1444 OS_REG_RMW_FIELD(ah, reg_PMU1, AR_PHY_PMU1_PWD, 0x1); in ar9300_internal_regulator_apply()
1516 OS_REG_RMW_FIELD(ah, in ar9300_xpa_bias_level_apply()
1519 OS_REG_RMW_FIELD(ah, in ar9300_xpa_bias_level_apply()
[all …]
H A Dar9300_mci.c70 OS_REG_RMW_FIELD(ah, AR_MCI_SCHD_TABLE_2, AR_MCI_SCHD_TABLE_2_HW_BASED, 1); in ar9300_mci_osla_setup()
71 OS_REG_RMW_FIELD(ah, AR_MCI_SCHD_TABLE_2, AR_MCI_SCHD_TABLE_2_MEM_BASED, 1); in ar9300_mci_osla_setup()
78 OS_REG_RMW_FIELD(ah, AR_MCI_MISC, AR_MCI_MISC_HW_FIX_EN, 1); in ar9300_mci_osla_setup()
82 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
84 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
92 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
96 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
111 OS_REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9300_mci_reset_req_wakeup()
114 OS_REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9300_mci_reset_req_wakeup()
539 OS_REG_RMW_FIELD(ah, AR_GLB_CONTROL, AR_GLB_DS_JTAG_DISABLE, 1); in ar9300_mci_observation_set_up()
[all …]
H A Dar9300_ani.c556 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar9300_ani_control()
558 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar9300_ani_control()
560 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M1_THRESH, in ar9300_ani_control()
562 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2_THRESH, in ar9300_ani_control()
564 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2COUNT_THR, in ar9300_ani_control()
566 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar9300_ani_control()
568 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, in ar9300_ani_control()
570 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, in ar9300_ani_control()
572 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M1_THRESH, in ar9300_ani_control()
574 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M2_THRESH, in ar9300_ani_control()
[all …]
H A Dar9300_interrupts.c747 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, value);
750 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, value);
753 OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_LAST, value);
756 OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_FIRST, value);
H A Dar9300_misc.c257 OS_REG_RMW_FIELD(ah, AR_CFG_LED, AR_CFG_LED_ASSOC_CTL, ledbits[state]); in ar9300_set_led_state()
269 OS_REG_RMW_FIELD(ah, AR_CFG_LED, AR_CFG_LED_POWER, val); in ar9300_set_power_led_state()
281 OS_REG_RMW_FIELD(ah, AR_CFG_LED, AR_CFG_LED_NETWORK, val); in ar9300_set_network_led_state()
598 OS_REG_RMW_FIELD(ah, in ar9300_set_ack_timeout()
630 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ar9300_set_quiet()
2613 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ar9300_bt_coex_disable()
2614 OS_REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0); in ar9300_bt_coex_disable()
2650 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ar9300_bt_coex_enable()
2652 OS_REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 1); in ar9300_bt_coex_enable()
2654 OS_REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0); in ar9300_bt_coex_enable()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_power.c36 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_ALLOW); in ar5210SetPowerModeAuto()
56 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE); in ar5210SetPowerModeAwake()
64 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, in ar5210SetPowerModeAwake()
90 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); in ar5210SetPowerModeSleep()
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_power.c45 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE); in ar5211SetPowerModeAwake()
53 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, in ar5211SetPowerModeAwake()
79 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); in ar5211SetPowerModeSleep()
92 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM); in ar5211SetPowerModeNetworkSleep()
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_ani.c247 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5212AniControl()
249 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5212AniControl()
251 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5212AniControl()
253 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5212AniControl()
272 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5212AniControl()
274 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5212AniControl()
276 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5212AniControl()
278 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5212AniControl()
280 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5212AniControl()
282 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5212AniControl()
[all …]
H A Dar5212_reset.c321 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, in ar5212Reset()
358 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK, in ar5212Reset()
372 OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... ); in ar5212Reset()
473 OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL, in ar5212Reset()
543 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212Reset()
1057 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1059 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1076 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1634 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, in ar5212SetBoardValues()
1676 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ar5212SetBoardValues()
[all …]
H A Dar5212_misc.c509 OS_REG_RMW_FIELD(ah, AR_TIME_OUT, in ar5212SetAckTimeout()
556 OS_REG_RMW_FIELD(ah, AR_TIME_OUT, in ar5212SetCTSTimeout()
692 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1); in ar5212SetupClock()
694 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 1); in ar5212SetupClock()
702 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x2); in ar5212SetupClock()
708 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x3); in ar5212SetupClock()
711 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x0); in ar5212SetupClock()
712 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0); in ar5212SetupClock()
729 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5212SetupClock()
742 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0); in ar5212RestoreClock()
[all …]
H A Dar5212_power.c99 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); in ar5212SetPowerModeSleep()
112 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM); in ar5212SetPowerModeNetworkSleep()
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_misc.c114 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1); in ar5312SetupClock()
119 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5312SetupClock()
147 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5312RestoreClock()
H A Dar5312_reset.c266 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK, in ar5312Reset()
280 OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... ); in ar5312Reset()
295 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, AR_PHY_RXGAIN_TXRX_RF_MAX, 0x0F); in ar5312Reset()
299 OS_REG_RMW_FIELD(ah, AR_PHY_CCK_RXCTRL4, AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT, 12); in ar5312Reset()
306 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_AGC, 32); in ar5312Reset()
391 OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL, in ar5312Reset()
467 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5312Reset()

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