xref: /freebsd/sys/dev/ath/ath_hal/ar5212/ar5212_power.c (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1*6e778a7eSPedro F. Giffuni /*-
2*6e778a7eSPedro F. Giffuni  * SPDX-License-Identifier: ISC
3*6e778a7eSPedro F. Giffuni  *
414779705SSam Leffler  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
514779705SSam Leffler  * Copyright (c) 2002-2008 Atheros Communications, Inc.
614779705SSam Leffler  *
714779705SSam Leffler  * Permission to use, copy, modify, and/or distribute this software for any
814779705SSam Leffler  * purpose with or without fee is hereby granted, provided that the above
914779705SSam Leffler  * copyright notice and this permission notice appear in all copies.
1014779705SSam Leffler  *
1114779705SSam Leffler  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1214779705SSam Leffler  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1314779705SSam Leffler  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1414779705SSam Leffler  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1514779705SSam Leffler  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1614779705SSam Leffler  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1714779705SSam Leffler  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1814779705SSam Leffler  */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler 
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler 
2414779705SSam Leffler #include "ar5212/ar5212.h"
2514779705SSam Leffler #include "ar5212/ar5212reg.h"
2614779705SSam Leffler #include "ar5212/ar5212desc.h"
2714779705SSam Leffler 
2814779705SSam Leffler /*
2914779705SSam Leffler  * Notify Power Mgt is enabled in self-generated frames.
3014779705SSam Leffler  * If requested, force chip awake.
3114779705SSam Leffler  *
3214779705SSam Leffler  * Returns A_OK if chip is awake or successfully forced awake.
3314779705SSam Leffler  *
3414779705SSam Leffler  * WARNING WARNING WARNING
3514779705SSam Leffler  * There is a problem with the chip where sometimes it will not wake up.
3614779705SSam Leffler  */
3714779705SSam Leffler static HAL_BOOL
ar5212SetPowerModeAwake(struct ath_hal * ah,int setChip)3814779705SSam Leffler ar5212SetPowerModeAwake(struct ath_hal *ah, int setChip)
3914779705SSam Leffler {
4014779705SSam Leffler #define	AR_SCR_MASK \
41f3d3bf87SRui Paulo     (AR_SCR_SLDUR|AR_SCR_SLE|AR_SCR_SLDTP|AR_SCR_SLDWP|\
42f3d3bf87SRui Paulo      AR_SCR_SLEPOL|AR_SCR_MIBIE|AR_SCR_UNKNOWN)
4314779705SSam Leffler #define	POWER_UP_TIME	2000
4414779705SSam Leffler 	uint32_t scr, val;
4514779705SSam Leffler 	int i;
4614779705SSam Leffler 
4714779705SSam Leffler 	if (setChip) {
4814779705SSam Leffler 		/*
4914779705SSam Leffler 		 * Be careful setting the AWAKE mode.  When we are called
5014779705SSam Leffler 		 * with the chip powered down the read returns 0xffffffff
5114779705SSam Leffler 		 * which when blindly written back with OS_REG_RMW_FIELD
5214779705SSam Leffler 		 * enables the MIB interrupt for the sleep performance
5314779705SSam Leffler 		 * counters.  This can result in an interrupt storm when
5414779705SSam Leffler 		 * ANI is in operation as no one knows to turn off the MIB
5514779705SSam Leffler 		 * interrupt cause.
5614779705SSam Leffler 		 */
5714779705SSam Leffler 		scr = OS_REG_READ(ah, AR_SCR);
5814779705SSam Leffler 		if (scr & ~AR_SCR_MASK) {
5914779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
6014779705SSam Leffler 			    "%s: bogus SCR 0x%x, PCICFG 0x%x\n",
6114779705SSam Leffler 			    __func__, scr, OS_REG_READ(ah, AR_PCICFG));
6214779705SSam Leffler 			scr = 0;
6314779705SSam Leffler 		}
6414779705SSam Leffler 		scr = (scr &~ AR_SCR_SLE) | AR_SCR_SLE_WAKE;
6514779705SSam Leffler 		OS_REG_WRITE(ah, AR_SCR, scr);
6614779705SSam Leffler 		OS_DELAY(10);	/* Give chip the chance to awake */
6714779705SSam Leffler 
6814779705SSam Leffler 		for (i = POWER_UP_TIME / 50; i != 0; i--) {
6914779705SSam Leffler 			val = OS_REG_READ(ah, AR_PCICFG);
7014779705SSam Leffler 			if ((val & AR_PCICFG_SPWR_DN) == 0)
7114779705SSam Leffler 				break;
7214779705SSam Leffler 			OS_DELAY(50);
7314779705SSam Leffler 			OS_REG_WRITE(ah, AR_SCR, scr);
7414779705SSam Leffler 		}
7514779705SSam Leffler 		if (i == 0) {
7614779705SSam Leffler #ifdef AH_DEBUG
7714779705SSam Leffler 			ath_hal_printf(ah, "%s: Failed to wakeup in %ums\n",
7814779705SSam Leffler 				__func__, POWER_UP_TIME/50);
7914779705SSam Leffler #endif
8014779705SSam Leffler 			return AH_FALSE;
8114779705SSam Leffler 		}
8214779705SSam Leffler 	}
8314779705SSam Leffler 
8414779705SSam Leffler 	OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
8514779705SSam Leffler 	return AH_TRUE;
8614779705SSam Leffler #undef POWER_UP_TIME
8714779705SSam Leffler #undef AR_SCR_MASK
8814779705SSam Leffler }
8914779705SSam Leffler 
9014779705SSam Leffler /*
9114779705SSam Leffler  * Notify Power Mgt is disabled in self-generated frames.
9214779705SSam Leffler  * If requested, force chip to sleep.
9314779705SSam Leffler  */
9414779705SSam Leffler static void
ar5212SetPowerModeSleep(struct ath_hal * ah,int setChip)9514779705SSam Leffler ar5212SetPowerModeSleep(struct ath_hal *ah, int setChip)
9614779705SSam Leffler {
9714779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
9814779705SSam Leffler 	if (setChip)
9914779705SSam Leffler 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
10014779705SSam Leffler }
10114779705SSam Leffler 
10214779705SSam Leffler /*
10314779705SSam Leffler  * Notify Power Management is enabled in self-generating
10414779705SSam Leffler  * fames.  If request, set power mode of chip to
10514779705SSam Leffler  * auto/normal.  Duration in units of 128us (1/8 TU).
10614779705SSam Leffler  */
10714779705SSam Leffler static void
ar5212SetPowerModeNetworkSleep(struct ath_hal * ah,int setChip)10814779705SSam Leffler ar5212SetPowerModeNetworkSleep(struct ath_hal *ah, int setChip)
10914779705SSam Leffler {
11014779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
11114779705SSam Leffler 	if (setChip)
11214779705SSam Leffler 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
11314779705SSam Leffler }
11414779705SSam Leffler 
11514779705SSam Leffler /*
11614779705SSam Leffler  * Set power mgt to the requested mode, and conditionally set
11714779705SSam Leffler  * the chip as well
11814779705SSam Leffler  */
11914779705SSam Leffler HAL_BOOL
ar5212SetPowerMode(struct ath_hal * ah,HAL_POWER_MODE mode,int setChip)12014779705SSam Leffler ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
12114779705SSam Leffler {
12214779705SSam Leffler #ifdef AH_DEBUG
12314779705SSam Leffler 	static const char* modes[] = {
12414779705SSam Leffler 		"AWAKE",
12514779705SSam Leffler 		"FULL-SLEEP",
12614779705SSam Leffler 		"NETWORK SLEEP",
12714779705SSam Leffler 		"UNDEFINED"
12814779705SSam Leffler 	};
12914779705SSam Leffler #endif
13014779705SSam Leffler 	int status = AH_TRUE;
13114779705SSam Leffler 
13214779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_POWER, "%s: %s -> %s (%s)\n", __func__,
1338a67b42aSAdrian Chadd 		modes[ah->ah_powerMode], modes[mode],
13414779705SSam Leffler 		setChip ? "set chip " : "");
13514779705SSam Leffler 	switch (mode) {
13614779705SSam Leffler 	case HAL_PM_AWAKE:
137ce3f9a89SAdrian Chadd 		if (setChip)
138f857fb4fSAdrian Chadd 			ah->ah_powerMode = mode;
13914779705SSam Leffler 		status = ar5212SetPowerModeAwake(ah, setChip);
14014779705SSam Leffler 		break;
14114779705SSam Leffler 	case HAL_PM_FULL_SLEEP:
14214779705SSam Leffler 		ar5212SetPowerModeSleep(ah, setChip);
143ce3f9a89SAdrian Chadd 		if (setChip)
144f857fb4fSAdrian Chadd 			ah->ah_powerMode = mode;
14514779705SSam Leffler 		break;
14614779705SSam Leffler 	case HAL_PM_NETWORK_SLEEP:
14714779705SSam Leffler 		ar5212SetPowerModeNetworkSleep(ah, setChip);
148ce3f9a89SAdrian Chadd 		if (setChip)
149f857fb4fSAdrian Chadd 			ah->ah_powerMode = mode;
15014779705SSam Leffler 		break;
15114779705SSam Leffler 	default:
15214779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown power mode %u\n",
15314779705SSam Leffler 		    __func__, mode);
15414779705SSam Leffler 		return AH_FALSE;
15514779705SSam Leffler 	}
15614779705SSam Leffler 	return status;
15714779705SSam Leffler }
15814779705SSam Leffler 
15914779705SSam Leffler /*
16014779705SSam Leffler  * Return the current sleep mode of the chip
16114779705SSam Leffler  */
16214779705SSam Leffler HAL_POWER_MODE
ar5212GetPowerMode(struct ath_hal * ah)16314779705SSam Leffler ar5212GetPowerMode(struct ath_hal *ah)
16414779705SSam Leffler {
16514779705SSam Leffler 	/* Just so happens the h/w maps directly to the abstracted value */
16614779705SSam Leffler 	return MS(OS_REG_READ(ah, AR_SCR), AR_SCR_SLE);
16714779705SSam Leffler }
16814779705SSam Leffler 
16914779705SSam Leffler #if 0
17014779705SSam Leffler /*
17114779705SSam Leffler  * Return the current sleep state of the chip
17214779705SSam Leffler  * TRUE = sleeping
17314779705SSam Leffler  */
17414779705SSam Leffler HAL_BOOL
17514779705SSam Leffler ar5212GetPowerStatus(struct ath_hal *ah)
17614779705SSam Leffler {
17714779705SSam Leffler 	return (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_SPWR_DN) != 0;
17814779705SSam Leffler }
17914779705SSam Leffler #endif
180