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Searched refs:OS_REG_CLR_BIT (Results 1 – 25 of 39) sorted by relevance

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/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_cal.c171 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9285_hw_cl_cal()
173 OS_REG_CLR_BIT(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE); in ar9285_hw_cl_cal()
181 OS_REG_CLR_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN); in ar9285_hw_cl_cal()
182 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); in ar9285_hw_cl_cal()
183 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
185 OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); in ar9285_hw_cl_cal()
197 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
198 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); in ar9285_hw_cl_cal()
H A Dar9287_cal.c69 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); in ar9287InitCalHardware()
H A Dar9280_attach.c445 OS_REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); in ar9280ConfigPCIE()
641 OS_REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK, AR_PHY_FORCE_CLKEN_CCK_MRC_MUX); in ar9280SpurMitigate()
652 OS_REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK, AR_PHY_FORCE_CLKEN_CCK_MRC_MUX); in ar9280SpurMitigate()
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_power.c82 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); in ar5416SetPowerModeAwake()
97 OS_REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN); in ar5416SetPowerModeSleep()
102 OS_REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN); in ar5416SetPowerModeSleep()
117 OS_REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN); in ar5416SetPowerModeNetworkSleep()
H A Dar5416_radar.c158 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA); in ar5416EnableDfs()
163 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128); in ar5416EnableDfs()
168 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_MAX_RRSSI); in ar5416EnableDfs()
173 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_BLOCK_CHECK); in ar5416EnableDfs()
192 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, in ar5416EnableDfs()
199 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, in ar5416EnableDfs()
217 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA); in ar5416EnableDfs()
H A Dar5416_misc.c407 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_CTL_LOW); in ar5416Set11nRxClear()
413 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_EXT_LOW); in ar5416Set11nRxClear()
440 OS_REG_CLR_BIT(ah, AR_TIMER_MODE, AR_TIMER_MODE_QUIET); in ar5416SetQuiet()
516 OS_REG_CLR_BIT(ah, AR_MISC_MODE, in ar5416SetCapability()
H A Dar5416_cal.c206 OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, in ar5416InitCalHardware()
231 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar5416InitCalHardware()
646 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF); in ar5416LoadNF()
647 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF); in ar5416LoadNF()
H A Dar5416_recv.c119 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT); in ar5416StartPcuReceive()
H A Dar5416_btcoex.c377 OS_REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL, in ar5416InitBTCoex()
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_recv.c77 OS_REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); in ar9300_set_rx_abort()
86 OS_REG_CLR_BIT(ah, AR_DIAG_SW, in ar9300_set_rx_abort()
97 OS_REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); in ar9300_set_rx_abort()
179 OS_REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); in ar9300_start_pcu_receive()
273 OS_REG_CLR_BIT(ah, AR_PCU_MISC, AR_PCU_SEL_EVM); in ar9300_set_rx_sel_evm()
H A Dar9300_timer.c139 OS_REG_CLR_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL, (1 << index)); in ar9300_start_generic_timer()
162 OS_REG_CLR_BIT(ah, in ar9300_stop_generic_timer()
167 OS_REG_CLR_BIT(ah, AR_IMR_S5, in ar9300_stop_generic_timer()
H A Dar9300_xmit.c699 OS_REG_CLR_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN); in ar9300_stop_tx_dma()
714 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH); in ar9300_stop_tx_dma()
804 OS_REG_CLR_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN); in ar9300_stop_tx_dma_indv_que()
819 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH); in ar9300_stop_tx_dma_indv_que()
938 OS_REG_CLR_BIT(ah, AR_PCU_MISC, AR_PCU_FORCE_QUIET_COLL | AR_PCU_CLEAR_VMF); in ar9300_abort_tx_dma()
940 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH | AR_DIAG_RX_DIS | in ar9300_abort_tx_dma()
942 OS_REG_CLR_BIT(ah, AR_D_GBL_IFS_MISC, AR_D_GBL_IFS_MISC_IGNORE_BACKOFF); in ar9300_abort_tx_dma()
H A Dar9300_spectral.c125 OS_REG_CLR_BIT(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRPWR_SIGN_BIT); in ar9300_disable_weak_signal()
132 OS_REG_CLR_BIT(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELPWR_SIGN_BIT); in ar9300_disable_weak_signal()
136 OS_REG_CLR_BIT(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELSTEP_SIGN_BIT); in ar9300_disable_weak_signal()
140 OS_REG_CLR_BIT( in ar9300_disable_weak_signal()
150 OS_REG_CLR_BIT( in ar9300_disable_weak_signal()
H A Dar9300_power.c468 OS_REG_CLR_BIT(ah, AR_MBOX_CTRL_STATUS, AR_MBOX_WOW_CONF); in ar9300_wow_offload_handshake()
477 OS_REG_CLR_BIT(ah, AR_MBOX_CTRL_STATUS, AR_MBOX_WOW_CONF); in ar9300_wow_offload_handshake()
534 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); in ar9300_set_power_mode_awake()
561 OS_REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN); in ar9300_set_power_mode_sleep()
574 OS_REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN); in ar9300_set_power_mode_sleep()
625 OS_REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN); in ar9300_set_power_mode_network_sleep()
1426 OS_REG_CLR_BIT(ah, AR_SW_WOW_CONTROL, AR_HW_WOW_DISABLE); in ar9300_wow_wake_up()
1427 OS_REG_CLR_BIT(ah, AR_SW_WOW_CONTROL, AR_SW_WOW_ENABLE); in ar9300_wow_wake_up()
H A Dar9300_beacon.c193 OS_REG_CLR_BIT(ah, AR_TIMER_MODE, (AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN)); in ar9300_set_sta_beacon_timers()
H A Dar9300_misc.c194 OS_REG_CLR_BIT(ah, AR_HOSTIF_REG(ah, AR_RFSILENT), in ar9300_enable_rf_kill()
196 OS_REG_CLR_BIT(ah, AR_PHY_TEST, RFSILENT_BB); in ar9300_enable_rf_kill()
205 OS_REG_CLR_BIT(ah, AR_HOSTIF_REG(ah, AR_GPIO_INPUT_MUX2), in ar9300_enable_rf_kill()
645 OS_REG_CLR_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN); in ar9300_set_quiet()
1070 OS_REG_CLR_BIT(ah, AR_PCU_MISC, AR_PCU_TXOP_TBTT_LIMIT_ENA); in ar9300_set_capability()
1960 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_CLEAR_CTL_LOW); in ar9300_set_11n_rx_clear()
1966 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_CLEAR_EXT_LOW); in ar9300_set_11n_rx_clear()
2734 OS_REG_CLR_BIT(ah, in ar9300_init_bt_coex()
3236 OS_REG_CLR_BIT(ah, AR_HWBCNPROC1, AR_HWBCNPROC1_CRC_ENABLE | in ar9300_set_hw_beacon_proc()
3314 OS_REG_CLR_BIT(ah, AR_XRTO, AR_ENABLE_SMARTANTENNA); in ar9300_set_smart_antenna()
H A Dar9300_reset.c109 OS_REG_CLR_BIT(ah, AR_PHY_USB_CTRL1, (1 << 20)); in ar9300_disable_pll_lock_detect()
1372 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar9300_set_operating_mode()
2292 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF); in ar9300_load_nf()
2293 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF); in ar9300_load_nf()
2848 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_MISSING_TX_INTR_FIX_ENABLE); in ar9300_override_ini()
3061 OS_REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2, AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); /* clr synthon */ in ar9300_process_ini()
3062 OS_REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2, AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); /* clr synthon */ in ar9300_process_ini()
3063 OS_REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2, AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); /* clr synthon */ in ar9300_process_ini()
3635 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9300_init_cal_internal()
3680 OS_REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0(ah), in ar9300_init_cal_internal()
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H A Dar9300_mci.c101 OS_REG_CLR_BIT(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
410 OS_REG_CLR_BIT(ah, AR_MCI_TX_CTRL, in ar9300_mci_2g5g_switch()
413 OS_REG_CLR_BIT(ah, AR_GLB_CONTROL, in ar9300_mci_2g5g_switch()
1161 OS_REG_CLR_BIT(ah, AR_MCI_TX_CTRL, AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); in ar9300_mci_reset()
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_power.c76 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SV); in ar5210SetPowerModeAwake()
H A Dar5210_misc.c325 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_NO_PSPOLL); in ar5210WriteAssocid()
508 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB); in ar5210SetAckCTSRate()
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_power.c65 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); in ar5211SetPowerModeAwake()
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_misc.c535 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB); in ar5212SetAckCTSRate()
1199 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
1206 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
1213 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
1220 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
1227 OS_REG_CLR_BIT(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
H A Dar5212_power.c84 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); in ar5212SetPowerModeAwake()
H A Dar5212_reset.c356 OS_REG_CLR_BIT(ah, AR_PHY_DAG_CTRLCCK, in ar5212Reset()
374 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS); in ar5212Reset()
812 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar5212SetOperatingMode()
1451 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF); in ar5212GetNf()
1452 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF); in ar5212GetNf()
1575 OS_REG_CLR_BIT(ah,AR_PHY_CCK_DETECT, in ar5212SetAntennaSwitchInternal()
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c264 OS_REG_CLR_BIT(ah, AR_PHY_DAG_CTRLCCK, in ar5312Reset()
282 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS); in ar5312Reset()

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