| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.cpp | 37 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, 56 LLT MemTy, in assignValueToAddress() argument 150 Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, in assignValueToAddress() argument 154 const MachinePointerInfo &MPO, LLT MemTy, in assignValueToAddress() 157 auto *MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy, in assignValueToAddress() 162 BuildLoad(MIRBuilder, MPO, MemTy, ValVReg, Addr); in assignValueToAddress()
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| H A D | PPCCallLowering.h | 50 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 132 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 137 MPO, MachineMemOperand::MOStore, MemTy, Align(1)); in assignValueToAddress() 265 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 272 MemTy = LLT::scalar(32); in assignValueToAddress() 275 auto LoadVReg = buildLoad(LLT::scalar(32), Addr, MemTy, MPO); in assignValueToAddress() 279 buildLoad(ValVReg, Addr, MemTy, MPO); in assignValueToAddress() 283 MachineInstrBuilder buildLoad(const DstOp &Res, Register Addr, LLT MemTy, in buildLoad() 287 auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy, in buildLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 80 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 88 MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, MemTy, in assignValueToAddress() 141 LLT MemTy(VAHi.getLocVT()); in assignCustomValue() local 145 MemTy.getSizeInBytes(), VAHi.getLocMemOffset(), MPO, Arg.Flags[0]); in assignCustomValue() 147 assignValueToAddress(NewRegs[1], StackAddr, MemTy, MPO, in assignCustomValue() 224 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 228 auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy, in assignValueToAddress() 271 LLT MemTy(VAHi.getLocVT()); in assignCustomValue() local 275 MemTy.getSizeInBytes(), VAHi.getLocMemOffset(), MPO, Arg.Flags[0]); in assignCustomValue() 277 assignValueToAddress(NewRegs[1], StackAddr, MemTy, MPO, in assignCustomValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 66 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 72 auto *MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, MemTy, in assignValueToAddress() 158 Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, in assignValueToAddress() argument 161 auto *MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy, in assignValueToAddress()
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| H A D | M68kCallLowering.h | 58 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.cpp | 710 LLT MemTy = StoreMI.getMMO().getMemoryType(); in mergeTruncStore() local 713 if (!MemTy.isScalar()) in mergeTruncStore() 715 switch (MemTy.getSizeInBits()) { in mergeTruncStore() 758 if (WideStoreTy.getSizeInBits() % MemTy.getSizeInBits() != 0) in mergeTruncStore() 761 WideStoreTy.getSizeInBits() / MemTy.getSizeInBits(); in mergeTruncStore() 775 if (NewStore->getMMO().getMemoryType() != MemTy || !NewStore->isSimple()) in mergeTruncStore() 822 WideStoreTy = LLT::scalar(FoundStores.size() * MemTy.getScalarSizeInBits()); in mergeTruncStore() 838 unsigned NarrowBits = MemTy.getScalarSizeInBits(); in mergeTruncStore()
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| H A D | LegalityPredicates.cpp | 212 const LLT MemTy = Query.MMODescrs[MMOIdx].MemoryTy; in memSizeNotByteSizePow2() local 213 return !MemTy.isByteSized() || in memSizeNotByteSizePow2() 215 MemTy.getSizeInBytes().getKnownMinValue()); in memSizeNotByteSizePow2()
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| H A D | LegalizerHelper.cpp | 1250 LLT MemTy = LLT::pointer(AddrSpace, PtrSize); in createResetStateLibcall() local 1252 DstOp Dest(MRI.createGenericVirtualRegister(MemTy)); in createResetStateLibcall() 4052 LLT MemTy = MMO.getMemoryType(); in lowerLoad() local 4055 unsigned MemSizeInBits = MemTy.getSizeInBits(); in lowerLoad() 4056 unsigned MemStoreSizeInBits = 8 * MemTy.getSizeInBytes(); in lowerLoad() 4059 if (MemTy.isVector()) in lowerLoad() 4128 if (TLI.allowsMemoryAccess(Ctx, MIRBuilder.getDataLayout(), MemTy, MMO)) in lowerLoad() 4134 if (MemTy.isVector()) { in lowerLoad() 4136 if (MemTy != DstTy) in lowerLoad() 4210 LLT MemTy = MMO.getMemoryType(); in lowerStore() local [all …]
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| H A D | CallLowering.cpp | 880 LLT MemTy = Handler.getStackValueStoreType(DL, VA, Flags); in handleAssignments() local 886 : MemTy.getSizeInBytes(), in handleAssignments() 896 Handler.assignValueToAddress(Args[i], Part, StackAddr, MemTy, MPO, in handleAssignments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 101 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, 154 Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, in assignValueToAddress() argument 157 auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy, in assignValueToAddress() 209 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, 245 Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, in assignValueToAddress() argument 251 MPO, MachineMemOperand::MOStore, MemTy, in assignValueToAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| H A D | X86LowerAMXType.cpp | 431 auto Prepare = [&](Type *MemTy) { in transformBitcast() argument 432 AllocaAddr = createAllocaInstAtEntry(Builder, Bitcast->getParent(), MemTy); in transformBitcast() 1323 auto Prepare = [&](Type *MemTy) { in transformAMXCast() argument 1324 AllocaAddr = createAllocaInstAtEntry(Builder, AMXCast->getParent(), MemTy); in transformAMXCast()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 115 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 121 auto *MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, MemTy, in assignValueToAddress() 209 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 214 MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, MemTy, in assignValueToAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 174 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 188 assert(LocTy.getSizeInBits() == MemTy.getSizeInBits()); in assignValueToAddress() 189 LocTy = MemTy; in assignValueToAddress() 346 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 352 auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, MemTy, in assignValueToAddress() 358 Register Addr, LLT MemTy, in assignValueToAddress() 361 unsigned MaxSize = MemTy.getSizeInBytes() * 8; in assignValueToAddress() 374 MemTy = LLT(VA.getValVT()); in assignValueToAddress() 380 MemTy = LLT(VA.getValVT()); in assignValueToAddress() 383 assignValueToAddress(ValVReg, Addr, MemTy, MPO, VA); in assignValueToAddress()
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| H A D | AArch64LegalizerInfo.cpp | 656 LLT MemTy = Q.MMODescrs[0].MemoryTy; in AArch64LegalizerInfo() local 660 return MemTy == s8; in AArch64LegalizerInfo() 662 return MemTy == s8 || MemTy == s16; in AArch64LegalizerInfo() 664 return MemTy == s8 || MemTy == s16 || MemTy == s32; in AArch64LegalizerInfo()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 289 LLT MemTy, const MachinePointerInfo &MPO, 296 Register Addr, LLT MemTy, in assignValueToAddress() 299 assignValueToAddress(Arg.Regs[ValRegIndex], Addr, MemTy, MPO, VA); in assignValueToAddress()
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| H A D | LegalizerInfo.h | 207 LLT MemTy; member 212 Align == Other.Align && MemTy == Other.MemTy; 222 MemTy.getSizeInBits() == Other.MemTy.getSizeInBits(); in isCompatible()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Hexagon.cpp | 398 llvm::Type *MemTy = CGF.ConvertTypeForMem(Ty); in EmitVAArgForHexagonLinux() local 400 llvm::PointerType::getUnqual(MemTy->getContext()), 2, "vaarg.addr"); in EmitVAArgForHexagonLinux() 404 return Address(ArgAddr, MemTy, CharUnits::fromQuantity(ArgAlign)); in EmitVAArgForHexagonLinux()
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| H A D | AArch64.cpp | 995 llvm::Type *MemTy = CGF.ConvertTypeForMem(Ty), *ElementTy = MemTy; in EmitAAPCSVAArg() local 1000 MemTy = llvm::PointerType::getUnqual(MemTy->getContext()); in EmitAAPCSVAArg() 1036 RegAddr = Tmp.withElementType(MemTy); in EmitAAPCSVAArg() 1049 RegAddr = BaseAddr.withElementType(MemTy); in EmitAAPCSVAArg() 1091 OnStackAddr = OnStackAddr.withElementType(MemTy); in EmitAAPCSVAArg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 1534 MVT::SimpleValueType MemTy, in pickOpcodeForVectorStParam() argument 1543 if (MemTy == MVT::f32 || MemTy == MVT::f64) { in pickOpcodeForVectorStParam() 1557 switch (MemTy) { in pickOpcodeForVectorStParam() 1634 MVT::SimpleValueType MemTy = Mem->getMemoryVT().getSimpleVT().SimpleTy; in tryStoreParam() local 1636 if (MemTy != MVT::f16 && MemTy != MVT::bf16 && in tryStoreParam() 1639 if (MemTy == MVT::f32 || MemTy == MVT::f64) { in tryStoreParam() 1651 pickOpcodeForVT(MemTy, NVPTX::StoreParamI8_i, NVPTX::StoreParamI16_i, in tryStoreParam() 1676 MVT::SimpleValueType MemTy = Mem->getMemoryVT().getSimpleVT().SimpleTy; in tryStoreParam() local 1677 Opcode = pickOpcodeForVectorStParam(Ops, NumElts, MemTy, CurDAG, DL); in tryStoreParam()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 57 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 139 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 145 MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, MemTy, in assignValueToAddress() 232 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress() 240 MPO, MachineMemOperand::MOStore, MemTy, in assignValueToAddress() 246 unsigned ValRegIndex, Register Addr, LLT MemTy, in assignValueToAddress() 252 assignValueToAddress(ValVReg, Addr, MemTy, MPO, VA); in assignValueToAddress()
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| H A D | AMDGPULegalizerInfo.h | 198 Register fixStoreSourceType(MachineIRBuilder &B, Register VData, LLT MemTy,
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 219 Type *MemTy = nullptr; member 223 MemAccessTy(Type *Ty, unsigned AS) : MemTy(Ty), AddrSpace(AS) {} in MemAccessTy() 226 return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace; in operator ==() 236 Type *getType() { return MemTy; } in getType() 1045 AccessTy.MemTy = Ty; in getAccessType() 1061 AccessTy.MemTy = OperandVal->getType(); in getAccessType() 1066 AccessTy.MemTy = OperandVal->getType(); in getAccessType() 1767 if (AccessTy.MemTy->isPointerTy()) in print() 1770 OS << *AccessTy.MemTy; in print() 1808 return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, FixedOffset, in isAMCompletelyFolded() [all …]
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGAtomic.cpp | 858 QualType MemTy = AtomicTy; in EmitAtomicExpr() local 860 MemTy = AT->getValueType(); in EmitAtomicExpr() 959 if (MemTy->isPointerType()) { in EmitAtomicExpr() 967 getContext().getTypeSizeInChars(MemTy->getPointeeType()); in EmitAtomicExpr() 997 ShouldCastToIntPtrTy = !MemTy->isFloatingType(); in EmitAtomicExpr()
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