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Searched refs:MX (Results 1 – 25 of 92) sorted by relevance

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/freebsd/contrib/bearssl/src/symcipher/
H A Dpoly1305_ctmulq.c111 #define MX(hi, lo, m0, m1, m2) do { \ in poly1305_inner_big() macro
151 MX(d0, c0, r0, u2, t1); in poly1305_inner_big()
152 MX(d1, c1, r1, r0, t2); in poly1305_inner_big()
153 MX(d2, c2, r2, r1, r0); in poly1305_inner_big()
166 MX(d0, c0, r0, u2, t1); in poly1305_inner_big()
167 MX(d1, c1, r1, r0, t2); in poly1305_inner_big()
168 MX(d2, c2, r2, r1, r0); in poly1305_inner_big()
181 MX(d0, c0, r0, u2, t1); in poly1305_inner_big()
182 MX(d1, c1, r1, r0, t2); in poly1305_inner_big()
183 MX(d2, c2, r2, r1, r0); in poly1305_inner_big()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenMux.cpp316 for (MuxInfo &MX : ML) { in genMuxInBlock()
317 unsigned MxOpc = getMuxOpcode(*MX.SrcT, *MX.SrcF); in genMuxInBlock()
323 if (!MX.At->getParent() || !MX.Def1->getParent() || !MX.Def2->getParent()) in genMuxInBlock()
326 MachineBasicBlock &B = *MX.At->getParent(); in genMuxInBlock()
327 const DebugLoc &DL = B.findDebugLoc(MX.At); in genMuxInBlock()
328 auto NewMux = BuildMI(B, MX.At, DL, HII->get(MxOpc), MX.DefR) in genMuxInBlock()
329 .addReg(MX.PredR) in genMuxInBlock()
330 .add(*MX.SrcT) in genMuxInBlock()
331 .add(*MX.SrcF); in genMuxInBlock()
333 B.remove(MX.Def1); in genMuxInBlock()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZvk.td269 def "_" # MInfo.MX : VPseudoBinaryNoMaskPolicy<RetClass, Op1Class, Op2Class,
279 defvar suffix = !if(sew, "_" # MInfo.MX # "_E" # sew, "_" # MInfo.MX);
286 def "_VV_" # m.MX : VPseudoBinaryNoMask_Zvk<m.vrclass, m.vrclass>;
292 foreach vs2_lmul = ZvkMxSet<m.MX>.vs2_lmuls in
293 def "_VS_" # m.MX # "_" # vs2_lmul.MX : VPseudoBinaryNoMask_Zvk<m.vrclass, vs2_lmul.vrclass>;
298 defvar mx = m.MX;
306 defvar mx = m.MX;
317 defvar mx = m.MX;
328 defvar mx = m.MX;
337 defvar mx = m.MX;
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H A DRISCVInstrInfoVSDPatterns.td34 defvar load_instr = !cast<Instruction>("PseudoVLE"#sew#"_V_"#vlmul.MX);
35 defvar store_instr = !cast<Instruction>("PseudoVSE"#sew#"_V_"#vlmul.MX);
71 instruction_name#"_VV_"# vlmul.MX#"_E"#!shl(1, log2sew),
72 instruction_name#"_VV_"# vlmul.MX))
92 instruction_name#"_VV_"# vlmul.MX#"_E"#!shl(1, log2sew),
93 instruction_name#"_VV_"# vlmul.MX))
119 instruction_name#_#suffix#_# vlmul.MX#"_E"#!shl(1, log2sew),
120 instruction_name#_#suffix#_# vlmul.MX))
170 instruction_name#"_"#vlmul.MX#"_E"#!shl(1, log2sew),
171 instruction_name#"_"#vlmul.MX))
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H A DRISCVInstrInfoVPseudos.td177 string MX = mx;
275 VReg RC = !cast<VReg>("VRN" # nf # !cond(!eq(m.value, V_MF8.value): V_M1.MX,
276 !eq(m.value, V_MF4.value): V_M1.MX,
277 !eq(m.value, V_MF2.value): V_M1.MX,
278 true: m.MX));
1857 defvar LInfo = lmul.MX;
1875 defvar LInfo = lmul.MX;
1892 defvar mx = mti.LMul.MX;
1904 defvar LInfo = lmul.MX;
1927 defvar DataLInfo = dataEMUL.MX;
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H A DRISCVInstrInfoXSf.td325 def "PseudoSF_VC_" # NAME # "_SE_" # m.MX
327 Sched<[!cast<SchedWrite>("WriteVC_" # NAME # "_" # m.MX)]>;
328 def "PseudoSF_VC_V_" # NAME # "_SE_" # m.MX
330 Sched<[!cast<SchedWrite>("WriteVC_V_" # NAME # "_" # m.MX)]>;
332 def "PseudoSF_VC_V_" # NAME # "_" # m.MX
334 Sched<[!cast<SchedWrite>("WriteVC_V_" # NAME # "_" # m.MX)]>;
342 def "PseudoSF_VC_" # NAME # "_SE_" # m.MX
344 Sched<[!cast<SchedWrite>("WriteVC_" # NAME # "_" # m.MX)]>;
345 def "PseudoSF_VC_V_" # NAME # "_SE_" # m.MX
347 Sched<[!cast<SchedWrite>("WriteVC_V_" # NAME # "_" # m.MX)]>;
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H A DRISCVInstrInfoVVLPatterns.td775 instruction_name#"_"#suffix#"_"#vlmul.MX#"_E"#!shl(1, log2sew)#"_MASK",
776 instruction_name#"_"#suffix#"_"#vlmul.MX#"_MASK"))
803 instruction_name#"_"#suffix#"_"#vlmul.MX#"_E"#!shl(1, log2sew)#"_MASK",
804 instruction_name#"_"#suffix#"_"#vlmul.MX#"_MASK"))
829 (!cast<Instruction>(instruction_name#"_"#suffix#"_"# vlmul.MX#"_TIED")
842 (!cast<Instruction>(instruction_name#"_"#suffix#"_"# vlmul.MX#"_TIED")
864 (!cast<Instruction>(instruction_name#"_"#suffix#"_"# vlmul.MX#"_MASK_TIED")
880 instruction_name#"_"#suffix#"_"#vlmul.MX#"_E"#!shl(1, log2sew)#"_TIED",
881 instruction_name#"_"#suffix#"_"#vlmul.MX#"_TIED");
935 instruction_name#_#suffix#_#vlmul.MX#"_E"#!shl(1, log2sew)#"_MASK",
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H A DRISCVInstrInfoZvqdotq.td40 SchedBinary<"WriteVIMulAddV", "ReadVIMulAddV", "ReadVIMulAddV", m.MX,
43 SchedBinary<"WriteVIMulAddX", "ReadVIMulAddV", "ReadVIMulAddX", m.MX,
H A DRISCVInstrInfoXRivos.td153 defvar mx = m.MX;
177 (!cast<Instruction>("PseudoRI_VEXTRACT_" # vti.LMul.MX)
185 (!cast<Instruction>("PseudoRI_VINSERT_" # vti.LMul.MX)
/freebsd/tools/test/stress2/misc/
H A Djumbo.sh131 if ((buf = malloc(MX)) == NULL)
132 err(1, "malloc(%d), %s:%d", MX, __FILE__, __LINE__);
134 for (i = sysconf(_SC_PAGESIZE); i < MX; i += 1024) {
192 if ((line = malloc(MX)) == NULL)
193 err(1, "malloc(%d), %s:%d", MX, __FILE__, __LINE__);
195 for (i = sysconf(_SC_PAGESIZE); i < MX; i += 1024) {
H A Dfork2.sh116 while ((atomic_load_int(&share[SYNC])) > MX)
124 while (atomic_load_int(&share[SYNC]) <= MX)
132 atomic_add_int(&share[SYNC], MX * 2);
H A Dcluster.sh84 v = v % MX;
102 offset = rnd() % (MX - ln);
140 offset = rnd() % (MX - ln);
183 offset = rnd() % MX;
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dimx-audio-sgtl5000.txt1 Freescale i.MX audio complex with SGTL5000 codec
9 - ssi-controller : The phandle of the i.MX SSI controller
35 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
37 - mux-ext-port : The external port of the i.MX audio muxer
H A Dimx-audio-es8328.txt1 Freescale i.MX audio complex with ES8328 codec
6 - ssi-controller : The phandle of the i.MX SSI controller
34 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
35 - mux-ext-port : The external port of the i.MX audio muxer (AUDMIX)
H A Deukrea-tlv320.txt11 - fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
13 - fsl,mux-ext-port : The external port of the i.MX audio muxer.
H A Dimx-audio-spdif.txt1 Freescale i.MX audio complex with S/PDIF transceiver
9 - spdif-controller : The phandle of the i.MX S/PDIF controller
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dimx.txt1 Freescale i.MX Media Video Device
27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
30 addition this device consists of an i.MX-specific "CSI2IPU gasket"
34 to the i.MX IPU CSIs.
H A Dcoda.txt4 Coda codec IPs are present in i.MX SoCs in various versions,
8 - compatible : should be "fsl,<chip>-src" for i.MX SoCs:
/freebsd/sys/contrib/device-tree/Bindings/display/imx/
H A Dfsl-imx-drm.txt1 Freescale i.MX DRM master device
4 The freescale i.MX DRM master device is a virtual device needed to list all
20 Freescale i.MX IPUv3
62 Freescale i.MX PRE (Prefetch Resolve Engine)
88 Freescale i.MX PRG (Prefetch Resolve Gasket)
/freebsd/contrib/sendmail/cf/feature/
H A Dbestmx_is_local.m430 # If we are the best MX for a site, then we want to accept
33 # listed us as their best MX.
36 # lower cost method is to list all the expected best MX hosts
H A Drelay_based_on_MX.m419 # MX map (to allow relaying to hosts that we MX for)
/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
4 Certain i.MX SoCs support different OPPs depending on the "market segment" and
/freebsd/contrib/tzdata/
H A Dzone.tab278 MX +1924-09909 America/Mexico_City Central Mexico
279 MX +2105-08646 America/Cancun Quintana Roo
280 MX +2058-08937 America/Merida Campeche, Yucatan
281 MX +2540-10019 America/Monterrey Durango; Coahuila, Nuevo Leon, Tamaulipas (most areas)
282 MX +2550-09730 America/Matamoros Coahuila, Nuevo Leon, Tamaulipas (US border)
283 MX +2838-10605 America/Chihuahua Chihuahua (most areas)
284 MX +3144-10629 America/Ciudad_Juarez Chihuahua (US border - west)
285 MX +2934-10425 America/Ojinaga Chihuahua (US border - east)
286 MX +2313-10625 America/Mazatlan Baja California Sur, Nayarit (most areas), Sinaloa
287 MX
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H A Dzone1970.tab220 MX +1924-09909 America/Mexico_City Central Mexico
221 MX +2105-08646 America/Cancun Quintana Roo
222 MX +2058-08937 America/Merida Campeche, Yucatán
223 MX +2540-10019 America/Monterrey Durango; Coahuila, Nuevo León, Tamaulipas (most areas)
224 MX +2550-09730 America/Matamoros Coahuila, Nuevo León, Tamaulipas (US border)
225 MX +2838-10605 America/Chihuahua Chihuahua (most areas)
226 MX +3144-10629 America/Ciudad_Juarez Chihuahua (US border - west)
227 MX +2934-10425 America/Ojinaga Chihuahua (US border - east)
228 MX +2313-10625 America/Mazatlan Baja California Sur, Nayarit (most areas), Sinaloa
229 MX
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/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dimx-sata.txt1 * Freescale i.MX AHCI SATA Controller
3 The Freescale i.MX SATA controller mostly conforms to the AHCI interface

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