Searched refs:MSUB (Results 1 – 13 of 13) sorted by relevance
/freebsd/contrib/bearssl/src/ec/ |
H A D | ec_prime_i15.c | 154 #define MSUB(d, a) (0x2000 + ((d) << 8) + ((a) << 4)) macro 224 MSUB(t2, t1), 247 MSUB(Px, t2), 248 MSUB(Px, t2), 261 MSUB(t2, Px), 264 MSUB(Py, t4), 265 MSUB(Py, t4), 340 MSUB(t2, t1), 341 MSUB(t4, t3), 360 MSUB(P1x, t5), [all …]
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H A D | ec_prime_i31.c | 153 #define MSUB(d, a) (0x2000 + ((d) << 8) + ((a) << 4)) macro 223 MSUB(t2, t1), 246 MSUB(Px, t2), 247 MSUB(Px, t2), 260 MSUB(t2, Px), 263 MSUB(Py, t4), 264 MSUB(Py, t4), 339 MSUB(t2, t1), 340 MSUB(t4, t3), 359 MSUB(P1x, t5), [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedPredNeoverse.td | 49 // Identify "[SU]?(MADD|MSUB)L?" as the alias for "[SU]?(MUL|MNEG)L?".
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H A D | AArch64SchedOryon.td | 817 (instregex "^MADD(W|X)rrr", "^MSUB(W|X)rrr", 1395 def : InstRW<[ORYONWrite_4Cyc_FP0123], (instregex "^(F|FN)MADD", "^(F|FN)MSUB")>;
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H A D | AArch64SchedCyclone.td | 193 // MUL/MNEG are aliases for MADD/MSUB.
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H A D | AArch64InstrFormats.td | 2618 // MADD/MSUB generation is decided by MachineCombiner.cpp
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H A D | AArch64InstrInfo.td | 2403 defm MSUB : MulAccum<1, "msub">;
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrFormats.td | 148 def OPC_MSUB : RISCVOpcode<"MSUB", 0b1000111>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsScheduleP5600.td | 201 def : InstRW<[P5600WriteAL2MAdd], (instrs MADD, MADDU, MSUB, MSUBU,
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H A D | MipsInstrInfo.td | 2385 // MADD*/MSUB* 2390 def MSUB : MMRel, MArithR<"msub", II_MSUB>, MULT_FM<0x1c, 4>, 2408 def PseudoMSUB : MAddSubPseudo<MSUB, MipsMSub, II_MSUB>,
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H A D | MicroMipsInstrInfo.td | 1116 def PseudoMSUB_MM : MAddSubPseudo<MSUB, MipsMSub, II_MSUB>,
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H A D | MipsScheduleGeneric.td | 147 def : InstRW<[GenericWriteHILO], (instrs MADD, MADDU, MSUB, MSUBU)>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | P9InstrResources.td | 478 (instregex "F(N)?MSUB(S)?_rec$"),
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