/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedPredNeoverse.td | 80 // MOVI Dd, #0 81 // MOVI Vd.2D, #0
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H A D | AArch64SchedPredicates.td | 326 [// MOVI Vd, #0 331 // MOVI Vd, #0, LSL #0
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H A D | AArch64AsmPrinter.cpp | 1714 MCInst MOVI; in emitFMov0() local 1715 MOVI.setOpcode(AArch64::MOVID); in emitFMov0() 1716 MOVI.addOperand(MCOperand::createReg(DestReg)); in emitFMov0() 1717 MOVI.addOperand(MCOperand::createImm(0)); in emitFMov0() 1718 EmitToStreamer(*OutStreamer, MOVI); in emitFMov0()
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H A D | AArch64ISelLowering.h | 194 MOVI, enumerator
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H A D | AArch64SchedFalkorDetails.td | 916 def : InstRW<[FalkorWr_1VXVY_0cyc], (instregex "(MOVI|MVNI)(D|v8b_ns|v2i32|v4i16|v2s_msl)$")>; // imm fwd 940 def : InstRW<[FalkorWr_2VXVY_0cyc], (instregex "(MOVI|MVNI)(v2d_ns|v16b_ns|v4i32|v8i16|v4s_msl)$")>; // imm fwd
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H A D | AArch64SchedCyclone.td | 332 // MOVI,MVNI are WriteV
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H A D | AArch64SchedExynosM3.td | 675 def : InstRW<[M3WriteMOVI], (instregex "^MOVI")>;
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H A D | AArch64SchedKryoDetails.td | 1618 (instregex "(MOVI|MVNI)(D|v8b_ns|v2i32|v4i16|v2s_msl)")>; 1624 (instregex "(MOVI|MVNI)(v2d_ns|v16b_ns|v4i32|v8i16|v4s_msl)")>;
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H A D | AArch64ISelDAGToDAG.cpp | 1362 SDNode *MOVI = in SelectAddrModeXRO() local 1364 SDValue MOVIV = SDValue(MOVI, 0); in SelectAddrModeXRO() 3317 SDNode *MOVI = CurDAG->getMachineNode( in tryBitfieldInsertOpFromOrAndImm() local 3321 SDValue Ops[] = {And.getOperand(0), SDValue(MOVI, 0), in tryBitfieldInsertOpFromOrAndImm()
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H A D | AArch64InstrInfo.td | 756 def AArch64movi : SDNode<"AArch64ISD::MOVI", SDT_AArch64MOVIedit>; 7533 // AdvSIMD MOVI 7586 defm MOVI : SIMDModifiedImmVectorShift<0, 0b10, 0b00, "movi">; 7589 // Using the MOVI to materialize fp constants.
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H A D | AArch64ISelLowering.cpp | 2359 case AArch64ISD::MOVI: { in computeKnownBitsForTargetNode() 2624 MAKE_CASE(AArch64ISD::MOVI) in getTargetNodeName() 13885 (NewOp = tryAdvSIMDModImm8(AArch64ISD::MOVI, Op, DAG, DefBits)) || in ConstantBuildVector() 19668 case AArch64ISD::MOVI: in tryExtendDUPToExtractHigh() 28465 Op.getOpcode() == AArch64ISD::MOVI || in isTargetCanonicalConstantNode()
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H A D | AArch64InstrFormats.td | 239 // The "MSL" shifter on the vector MOVI instruction.
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
H A D | XtensaInstrInfo.cpp | 164 BuildMI(MBB, MBBI, DL, get(Xtensa::MOVI), *Reg).addImm(Value); in loadImmediate() 169 BuildMI(MBB, MBBI, DL, get(Xtensa::MOVI), *Reg).addImm(Low); in loadImmediate()
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H A D | XtensaInstrInfo.td | 83 def MOVI : RRI8_Inst<0x02, (outs AR:$t), (ins imm12m:$imm),
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kInstrData.td | 22 /// MOVI [x] MOVSX [x] MOVZX [x] MOVX [x] 168 // No pattern, as all immediate -> register moves are matched to the MOVI pseudo 256 // No pattern, as all immediate -> register moves are matched to the MOVI pseudo
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
H A D | XtensaAsmParser.cpp | 379 case Xtensa::MOVI: { in processInstruction()
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/freebsd/contrib/file/magic/Magdir/ |
H A D | animation | 11 0 string MOVI Silicon Graphics movie file
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