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Searched refs:M68k (Results 1 – 25 of 44) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.h32 namespace M68k {
58 static inline M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC) { in GetOppositeBranchCondition()
62 case M68k::COND_T: in GetOppositeBranchCondition()
63 return M68k::COND_F; in GetOppositeBranchCondition()
64 case M68k::COND_F: in GetOppositeBranchCondition()
65 return M68k::COND_T; in GetOppositeBranchCondition()
66 case M68k::COND_HI: in GetOppositeBranchCondition()
67 return M68k::COND_LS; in GetOppositeBranchCondition()
68 case M68k::COND_LS: in GetOppositeBranchCondition()
69 return M68k::COND_HI; in GetOppositeBranchCondition()
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H A DM68kExpandPseudo.cpp83 case M68k::MOVI8di: in INITIALIZE_PASS()
85 case M68k::MOVI16ri: in INITIALIZE_PASS()
87 case M68k::MOVI32ri: in INITIALIZE_PASS()
90 case M68k::MOVXd16d8: in INITIALIZE_PASS()
92 case M68k::MOVXd32d8: in INITIALIZE_PASS()
94 case M68k::MOVXd32d16: in INITIALIZE_PASS()
97 case M68k::MOVSXd16d8: in INITIALIZE_PASS()
99 case M68k::MOVSXd32d8: in INITIALIZE_PASS()
101 case M68k::MOVSXd32d16: in INITIALIZE_PASS()
104 case M68k::MOVZXd16d8: in INITIALIZE_PASS()
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H A DM68kInstrInfo.cpp44 : M68kGenInstrInfo(M68k::ADJCALLSTACKDOWN, M68k::ADJCALLSTACKUP, 0, in M68kInstrInfo()
45 M68k::RET), in M68kInstrInfo()
48 static M68k::CondCode getCondFromBranchOpc(unsigned BrOpc) { in getCondFromBranchOpc()
51 return M68k::COND_INVALID; in getCondFromBranchOpc()
52 case M68k::Beq8: in getCondFromBranchOpc()
53 return M68k::COND_EQ; in getCondFromBranchOpc()
54 case M68k::Bne8: in getCondFromBranchOpc()
55 return M68k::COND_NE; in getCondFromBranchOpc()
56 case M68k::Blt8: in getCondFromBranchOpc()
57 return M68k::COND_LT; in getCondFromBranchOpc()
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H A DM68kCallingConv.h43 static const MCPhysReg DataRegList[] = {M68k::D0, M68k::D1, M68k::A0, in CC_M68k_Any_AssignToReg()
44 M68k::A1}; in CC_M68k_Any_AssignToReg()
48 M68k::A0, in CC_M68k_Any_AssignToReg()
49 M68k::A1, in CC_M68k_Any_AssignToReg()
50 M68k::D0, in CC_M68k_Any_AssignToReg()
51 M68k::D1, in CC_M68k_Any_AssignToReg()
H A DM68kFrameLowering.cpp153 case M68k::RET: { in findDeadCallerSavedReg()
202 unsigned AndOp = M68k::AND32di; in BuildStackAlignAND()
203 unsigned MovOp = M68k::MOV32rr; in BuildStackAlignAND()
208 unsigned Tmp = M68k::D0; in BuildStackAlignAND()
350 if (IsSub && !isRegLiveIn(MBB, M68k::D0)) in emitSPUpdate()
351 Reg = M68k::D0; in emitSPUpdate()
356 unsigned Opc = M68k::MOV32ri; in emitSPUpdate()
358 Opc = IsSub ? M68k::SUB32ar : M68k::ADD32ar; in emitSPUpdate()
401 if (Opc == M68k::ADD32ai && PI->getOperand(0).getReg() == StackPtr) { in mergeSPUpdates()
407 } else if (Opc == M68k::SUB32ai && PI->getOperand(0).getReg() == StackPtr) { in mergeSPUpdates()
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H A DM68kISelLowering.cpp58 addRegisterClass(MVT::i8, &M68k::DR8RegClass); in M68kTargetLowering()
59 addRegisterClass(MVT::i16, &M68k::XR16RegClass); in M68kTargetLowering()
60 addRegisterClass(MVT::i32, &M68k::XR32RegClass); in M68kTargetLowering()
198 return M68k::D0; in getExceptionPointerRegister()
203 return M68k::D1; in getExceptionSelectorRegister()
335 if ((Opcode == M68k::LEA32p || Opcode == M68k::LEA32f) && in MatchingStackOffset()
853 if (M68k::isCalleePop(CallConv, IsVarArg, in LowerCall()
950 RC = &M68k::XR32RegClass; in LowerFormalArguments()
1043 if (M68k::isCalleePop(CCID, IsVarArg, in LowerFormalArguments()
1153 unsigned RetValReg = M68k::D0; in LowerReturn()
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H A DM68kRegisterInfo.cpp48 : M68kGenRegisterInfo(M68k::A0, 0, 0, M68k::PC), Subtarget(ST) { in M68kRegisterInfo()
49 StackPtr = M68k::SP; in M68kRegisterInfo()
50 FramePtr = M68k::A6; in M68kRegisterInfo()
51 GlobalBasePtr = M68k::A5; in M68kRegisterInfo()
52 BasePtr = M68k::A4; in M68kRegisterInfo()
72 return &M68k::XR32_TCRegClass; in getRegsForTailCall()
117 int Result = getRegisterOrder(Reg, *getRegClass(M68k::SPILLRegClassID)); in getSpillRegisterOrder()
143 setBitVector(M68k::PC); in getReservedRegs()
144 setBitVector(M68k::SP); in getReservedRegs()
268 return &M68k::DR32RegClass; in intRegClass()
H A DM68kCallingConv.td1 //===-- M68kCallingConv.td - Calling Conventions for M68k --*- tablegen -*-===//
10 /// This describes the calling conventions for the M68k architectures. These
25 /// M68k C return convention.
34 /// M68k fastcc return convention.
46 /// This is the root return-value convention for the M68k backend.
53 // M68k C Calling Convention
56 /// CC_M68k_Common - In all M68k calling conventions, extra integers and FP
74 /// Since M68k uses %An for pointers and we want them be passed in regs
98 /// This is the root argument convention for the M68k backend.
H A DM68k.td1 //===-- M68k.td - Motorola 680x0 target definitions --------*- tablegen -*-===//
11 /// to here as the "M68k" architecture.
18 // M68k Subtarget features
61 SubtargetFeature<"reserve-a"#i, "UserReservedRegister[M68k::A"#i#"]",
65 SubtargetFeature<"reserve-d"#i, "UserReservedRegister[M68k::D"#i#"]",
69 // M68k processors supported.
132 def M68k : Target {
H A DM68kMCInstLower.cpp173 if (Opcode == M68k::TAILJMPj || Opcode == M68k::TAILJMPq) { in Lower()
176 case M68k::TAILJMPj: in Lower()
177 Opcode = M68k::JMP32j; in Lower()
179 case M68k::TAILJMPq: in Lower()
180 Opcode = M68k::BRA8; in Lower()
H A DM68kSchedule.td1 //===-- M68kSchedule.td - M68k Scheduling Definitions ------*- tablegen -*-===//
10 /// This file contains M68k scheduler definitions.
14 /// This is a very general M68k Scheduling Model and best suited for the very
H A DM68kCollapseMOVEMPass.cpp189 BuildMI(MBB, End, DL, TII->get(M68k::MOVM32mp)) in Finish()
194 BuildMI(MBB, End, DL, TII->get(M68k::MOVM32pm)) in Finish()
262 case M68k::MOVM32jm: in runOnMachineFunction()
268 case M68k::MOVM32pm: in runOnMachineFunction()
274 case M68k::MOVM32mj: in runOnMachineFunction()
280 case M68k::MOVM32mp: in runOnMachineFunction()
H A DM68kRegisterInfo.td1 //==-- M68kRegisterInfo.td - M68k register definitions ------*- tablegen -*-==//
10 /// This file describes the M68k Register file, defining the registers
20 let Namespace = "M68k";
27 let Namespace = "M68k" in {
99 : RegisterClass<"M68k", regTypes, alignment, regList>;
H A DM68kAsmPrinter.cpp109 using namespace M68k; in PrintAsmMemoryOperand()
176 case M68k::TAILJMPj: in emitInstruction()
177 case M68k::TAILJMPq: in emitInstruction()
H A DM68kRegisterInfo.h103 if (RC == &M68k::CCRCRegClass) in getCrossCopyRegClass()
104 return &M68k::DR32RegClass; in getCrossCopyRegClass()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kBaseInfo.h1 //===-- M68kBaseInfo.h - Top level definitions for M68k MC ------*- C++ -*-===//
11 /// for the M68k target useful for the compiler back-end and the MC
34 namespace M68k {
94 } // namespace M68k
254 case M68k::WA0: in isAddressRegister()
255 case M68k::WA1: in isAddressRegister()
256 case M68k::WA2: in isAddressRegister()
257 case M68k::WA3: in isAddressRegister()
258 case M68k::WA4: in isAddressRegister()
259 case M68k in isAddressRegister()
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H A DM68kAsmBackend.cpp102 case M68k::BRA8: in getRelaxedOpcodeBranch()
103 return M68k::BRA16; in getRelaxedOpcodeBranch()
104 case M68k::Bcc8: in getRelaxedOpcodeBranch()
105 return M68k::Bcc16; in getRelaxedOpcodeBranch()
106 case M68k::Bls8: in getRelaxedOpcodeBranch()
107 return M68k::Bls16; in getRelaxedOpcodeBranch()
108 case M68k::Blt8: in getRelaxedOpcodeBranch()
109 return M68k::Blt16; in getRelaxedOpcodeBranch()
110 case M68k::Beq8: in getRelaxedOpcodeBranch()
111 return M68k::Beq16; in getRelaxedOpcodeBranch()
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H A DM68kMemOperandPrinter.h47 impl().printDisp(MI, OpNum + M68k::MemDisp, O); in printARIDMem()
49 impl().printOperand(MI, OpNum + M68k::MemBase, O); in printARIDMem()
55 impl().printDisp(MI, OpNum + M68k::MemDisp, O); in printARIIMem()
57 impl().printOperand(MI, OpNum + M68k::MemBase, O); in printARIIMem()
59 impl().printOperand(MI, OpNum + M68k::MemIndex, O); in printARIIMem()
66 impl().printDisp(MI, OpNum + M68k::PCRelDisp, O); in printPCDMem()
73 impl().printDisp(MI, OpNum + M68k::PCRelDisp, O); in printPCIMem()
75 impl().printOperand(MI, OpNum + M68k::PCRelIndex, O); in printPCIMem()
H A DM68kMCTargetDesc.cpp56 InitM68kMCRegisterInfo(X, llvm::M68k::A0, 0, 0, llvm::M68k::PC); in createM68kMCRegisterInfo()
85 nullptr, MRI.getDwarfRegNum(llvm::M68k::SP, true), -StackGrowth); in createM68kMCAsmInfo()
90 nullptr, MRI.getDwarfRegNum(M68k::PC, true), StackGrowth); in createM68kMCAsmInfo()
H A DM68kMCCodeEmitter.cpp1 //===-- M68kMCCodeEmitter.cpp - Convert M68k code emitter -------*- C++ -*-===//
10 /// This file contains defintions for M68k code emitter.
103 // A M68k instruction is aligned by word (16 bits). That means, 32-bit
124 Value |= M68k::swapWord<value_t>(static_cast<value_t>(MCO.getImm())); in encodeRelocImm()
131 Value |= M68k::swapWord<value_t>(static_cast<value_t>(Addr)); in encodeRelocImm()
151 Value |= M68k::swapWord<value_t>(static_cast<value_t>(MCO.getImm())); in encodePCRelImm()
185 case M68k::FPC: in getMachineOpValue()
188 case M68k::FPS: in getMachineOpValue()
191 case M68k::FPIAR: in getMachineOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/AsmParser/
H A DM68kAsmParser.cpp236 M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5, in getRegisterByIndex()
237 M68k::D6, M68k::D7, M68k::A0, M68k::A1, M68k::A2, M68k::A3, in getRegisterByIndex()
238 M68k::A4, M68k::A5, M68k::A6, M68k::SP, M68k::FP0, M68k::FP1, in getRegisterByIndex()
239 M68k::FP2, M68k::FP3, M68k::FP4, M68k::FP5, M68k::FP6, M68k::FP7}; in getRegisterByIndex()
246 if (Register >= M68k::D0 && Register <= M68k::D7) in getRegisterIndex()
247 return Register - M68k::D0; in getRegisterIndex()
248 if (Register >= M68k::A0 && Register <= M68k::A6) in getRegisterIndex()
249 return Register - M68k::A0 + 8; in getRegisterIndex()
250 if (Register >= M68k::FP0 && Register <= M68k::FP7) in getRegisterIndex()
251 return Register - M68k::FP0 + 16; in getRegisterIndex()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp1 //===-- M68kDisassembler.cpp - Disassembler for M68k ------------*- C++ -*-===//
9 // This file is part of the M68k Disassembler.
13 #include "M68k.h"
36 M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5,
37 M68k
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kRegisterBankInfo.cpp9 /// This file implements the targeting of the RegisterBankInfo class for M68k.
30 namespace M68k { namespace
55 } // end namespace M68k
64 return getRegBank(M68k::GPRRegBankID); in getRegBankFromRegClass()
80 const ValueMapping *OperandsMapping = &M68k::ValueMappings[M68k::GPR3OpsIdx]; in getInstrMapping()
90 OperandsMapping = &M68k::ValueMappings[M68k::GPR3OpsIdx]; in getInstrMapping()
97 getOperandsMapping({&M68k::ValueMappings[M68k in getInstrMapping()
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H A DM68kRegisterBanks.td1 //===-- M68kRegisterBanks.td - Describe the M68k Banks -----*- tablegen -*-===//
10 /// Define the M68k register banks used for GlobalISel.
H A DM68kCallLowering.cpp98 auto MIB = MIRBuilder.buildInstrNoInsert(M68k::RTS); in lowerReturn()
211 unsigned Opc = TLI.getTargetMachine().isPositionIndependent() ? M68k::CALLq in lowerCall()
212 : Info.Callee.isReg() ? M68k::CALLj in lowerCall()
213 : M68k::CALLb; in lowerCall()

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